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R600: Clean up extended load patterns 

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186914
This commit is contained in:
Tom Stellard 2013-07-23 01:47:52 +00:00
parent beed74af48
commit 33dd04bfbe
6 changed files with 33 additions and 16 deletions
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20
llvm/lib/Target/R600/AMDGPUInstructions.td
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@ -92,11 +92,27 @@ def az_extload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
L->getExtensionType() == ISD::EXTLOAD;
}]>;
def zextloadi8_global : PatFrag<(ops node:$ptr), (zextloadi8 node:$ptr), [{
def az_extloadi8 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
}]>;
def az_extloadi8_global : PatFrag<(ops node:$ptr), (az_extloadi8 node:$ptr), [{
return isGlobalLoad(dyn_cast<LoadSDNode>(N));
}]>;
def zextloadi8_constant : PatFrag<(ops node:$ptr), (zextloadi8 node:$ptr), [{
def az_extloadi8_constant : PatFrag<(ops node:$ptr), (az_extloadi8 node:$ptr), [{
return isGlobalLoad(dyn_cast<LoadSDNode>(N));
}]>;
def az_extloadi16 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
}]>;
def az_extloadi16_global : PatFrag<(ops node:$ptr), (az_extloadi16 node:$ptr), [{
return isGlobalLoad(dyn_cast<LoadSDNode>(N));
}]>;
def az_extloadi16_constant : PatFrag<(ops node:$ptr), (az_extloadi16 node:$ptr), [{
return isGlobalLoad(dyn_cast<LoadSDNode>(N));
}]>;

8
llvm/lib/Target/R600/R600ISelLowering.cpp
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@ -71,10 +71,10 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
setOperationAction(ISD::LOAD, MVT::i32, Custom);
setOperationAction(ISD::LOAD, MVT::v2i32, Expand);
setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
setLoadExtAction(ISD::EXTLOAD, MVT::v4i8, Custom);
setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Custom);
setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i8, Custom);
setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Expand);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Expand);
setOperationAction(ISD::STORE, MVT::i8, Custom);
setOperationAction(ISD::STORE, MVT::i32, Custom);
setOperationAction(ISD::STORE, MVT::v2i32, Expand);

16
llvm/lib/Target/R600/R600Instructions.td
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@ -317,8 +317,8 @@ class LoadParamFrag <PatFrag load_type> : PatFrag <
>;
def load_param : LoadParamFrag<load>;
def load_param_zexti8 : LoadParamFrag<zextloadi8>;
def load_param_zexti16 : LoadParamFrag<zextloadi16>;
def load_param_exti8 : LoadParamFrag<az_extloadi8>;
def load_param_exti16 : LoadParamFrag<az_extloadi16>;
def isR600 : Predicate<"Subtarget.getGeneration() <= AMDGPUSubtarget::R700">;
def isR700 : Predicate<"Subtarget.getGeneration() == AMDGPUSubtarget::R700">;
@ -1380,11 +1380,11 @@ class VTX_READ_128_eg <bits<8> buffer_id, list<dag> pattern>
//===----------------------------------------------------------------------===//
def VTX_READ_PARAM_8_eg : VTX_READ_8_eg <0,
[(set i32:$dst_gpr, (load_param_zexti8 ADDRVTX_READ:$src_gpr))]
[(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
>;
def VTX_READ_PARAM_16_eg : VTX_READ_16_eg <0,
[(set i32:$dst_gpr, (load_param_zexti16 ADDRVTX_READ:$src_gpr))]
[(set i32:$dst_gpr, (load_param_exti16 ADDRVTX_READ:$src_gpr))]
>;
def VTX_READ_PARAM_32_eg : VTX_READ_32_eg <0,
@ -1401,7 +1401,7 @@ def VTX_READ_PARAM_128_eg : VTX_READ_128_eg <0,
// 8-bit reads
def VTX_READ_GLOBAL_8_eg : VTX_READ_8_eg <1,
[(set i32:$dst_gpr, (zextloadi8_global ADDRVTX_READ:$src_gpr))]
[(set i32:$dst_gpr, (az_extloadi8_global ADDRVTX_READ:$src_gpr))]
>;
// 32-bit reads
@ -1828,11 +1828,11 @@ class VTX_READ_128_cm <bits<8> buffer_id, list<dag> pattern>
// VTX Read from parameter memory space
//===----------------------------------------------------------------------===//
def VTX_READ_PARAM_8_cm : VTX_READ_8_cm <0,
[(set i32:$dst_gpr, (load_param_zexti8 ADDRVTX_READ:$src_gpr))]
[(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
>;
def VTX_READ_PARAM_16_cm : VTX_READ_16_cm <0,
[(set i32:$dst_gpr, (load_param_zexti16 ADDRVTX_READ:$src_gpr))]
[(set i32:$dst_gpr, (load_param_exti16 ADDRVTX_READ:$src_gpr))]
>;
def VTX_READ_PARAM_32_cm : VTX_READ_32_cm <0,
@ -1849,7 +1849,7 @@ def VTX_READ_PARAM_128_cm : VTX_READ_128_cm <0,
// 8-bit reads
def VTX_READ_GLOBAL_8_cm : VTX_READ_8_cm <1,
[(set i32:$dst_gpr, (zextloadi8_global ADDRVTX_READ:$src_gpr))]
[(set i32:$dst_gpr, (az_extloadi8_global ADDRVTX_READ:$src_gpr))]
>;
// 32-bit reads

2
llvm/lib/Target/R600/SIInstructions.td
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@ -1746,7 +1746,7 @@ defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX2_ADDR64, i64,
defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORD_ADDR64, i32,
global_load, constant_load>;
defm : MUBUFLoad_Pattern <BUFFER_LOAD_UBYTE_ADDR64, i32,
zextloadi8_global, zextloadi8_constant>;
az_extloadi8_global, az_extloadi8_constant>;
defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX2_ADDR64, i64,
global_load, constant_load>;
defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX2_ADDR64, i64,

2
llvm/test/CodeGen/R600/i8-to-double-to-float.ll
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@ -1,6 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
;CHECK: UINT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: UINT_TO_FLT * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
define void @test(float addrspace(1)* %out, i8 addrspace(1)* %in) {
%1 = load i8 addrspace(1)* %in

1
llvm/test/CodeGen/R600/short-args.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s
; CHECK: @i8_arg
; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}