forked from OSchip/llvm-project
Fix pr4843: When an instruction has multiple destination registers that are
tied to different source registers, the TwoAddressInstructionPass needs to be smarter. Change it to check before replacing a source register whether that source register is tied to a different destination register, and if so, defer handling it until a subsequent iteration. llvm-svn: 80654
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@ -968,23 +968,67 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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// Update DistanceMap.
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DistanceMap.insert(std::make_pair(prevMI, Dist));
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DistanceMap[mi] = ++Dist;
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// Scan the operands to find: (1) the use operand that kills regB (if
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// any); (2) whether the kill operand is being replaced by regA on
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// this iteration; and (3) the first use of regB that is not being
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// replaced on this iteration. A use of regB will not replaced if it
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// is tied to a different destination register and will be handled on
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// a later iteration.
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MachineOperand *KillMO = NULL;
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MachineOperand *FirstKeptMO = NULL;
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bool KillMOKept = false;
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for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = mi->getOperand(i);
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if (MO.isReg() && MO.getReg() == regB && MO.isUse()) {
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// Check if this operand is tied to a different destination.
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bool isKept = false;
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unsigned dsti = 0;
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if (mi->isRegTiedToDefOperand(i, &dsti) && dsti != ti) {
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isKept = true;
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if (!FirstKeptMO)
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FirstKeptMO = &MO;
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}
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if (MO.isKill()) {
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KillMO = &MO;
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KillMOKept = isKept;
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}
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}
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}
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// Update live variables for regB.
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if (LV) {
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if (LV->removeVirtualRegisterKilled(regB, mi))
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LV->addVirtualRegisterKilled(regB, prevMI);
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if (LV->removeVirtualRegisterDead(regB, mi))
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LV->addVirtualRegisterDead(regB, prevMI);
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if (KillMO) {
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if (!FirstKeptMO) {
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// All uses of regB are being replaced; move the kill to prevMI.
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if (LV && LV->removeVirtualRegisterKilled(regB, mi))
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LV->addVirtualRegisterKilled(regB, prevMI);
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} else {
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if (!KillMOKept) {
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// The kill marker is on an operand being replaced, but there
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// are other uses of regB remaining. Move the kill marker to
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// one of them.
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KillMO->setIsKill(false);
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FirstKeptMO->setIsKill(true);
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}
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}
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}
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DEBUG(errs() << "\t\tprepend:\t" << *prevMI);
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// Replace all occurences of regB with regA.
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// Replace uses of regB with regA.
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for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
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if (mi->getOperand(i).isReg() &&
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mi->getOperand(i).getReg() == regB)
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mi->getOperand(i).setReg(regA);
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MachineOperand &MO = mi->getOperand(i);
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if (MO.isReg() && MO.getReg() == regB && MO.isUse()) {
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// Skip operands that are tied to other register definitions.
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unsigned dsti = 0;
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if (mi->isRegTiedToDefOperand(i, &dsti) && dsti != ti)
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continue;
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MO.setReg(regA);
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}
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}
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assert(mi->getOperand(ti).isDef() && mi->getOperand(si).isUse());
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@ -0,0 +1,9 @@
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; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
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; pr4843
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define <4 x i16> @v2regbug(<4 x i16>* %B) nounwind {
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;CHECK: v2regbug:
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;CHECK: vzip.16
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%tmp1 = load <4 x i16>* %B
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%tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32><i32 0, i32 0, i32 1, i32 1>
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ret <4 x i16> %tmp2
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}
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