forked from OSchip/llvm-project
[AMDGPU][mc] Fix memory corruption uncovered by AddressSanitizer during coverage/smoke Gfx7/8 testing.
Coverage/smoke Gfx7/8 tests were committed r292922 but then reverted by r292974 due to AddressSanitizer failure, which is fixed by this patch. Tests to be re-committed soon. llvm-svn: 293338
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@ -2373,8 +2373,6 @@ void AMDGPUAsmParser::cvtDS(MCInst &Inst, const OperandVector &Operands) {
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}
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addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset);
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addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGDS);
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if (!GDSOnly) {
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addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGDS);
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}
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@ -335,12 +335,14 @@ unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI) {
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}
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bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo) {
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assert(OpNo <= Desc.NumOperands);
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unsigned OpType = Desc.OpInfo[OpNo].OperandType;
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return OpType >= AMDGPU::OPERAND_SRC_FIRST &&
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OpType <= AMDGPU::OPERAND_SRC_LAST;
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}
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bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo) {
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assert(OpNo <= Desc.NumOperands);
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unsigned OpType = Desc.OpInfo[OpNo].OperandType;
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switch (OpType) {
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case AMDGPU::OPERAND_REG_IMM_FP32:
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@ -356,6 +358,7 @@ bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo) {
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}
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bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo) {
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assert(OpNo <= Desc.NumOperands);
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unsigned OpType = Desc.OpInfo[OpNo].OperandType;
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return OpType >= AMDGPU::OPERAND_REG_INLINE_C_FIRST &&
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OpType <= AMDGPU::OPERAND_REG_INLINE_C_LAST;
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@ -399,6 +402,7 @@ unsigned getRegBitWidth(const MCRegisterClass &RC) {
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unsigned getRegOperandSize(const MCRegisterInfo *MRI, const MCInstrDesc &Desc,
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unsigned OpNo) {
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assert(OpNo <= Desc.NumOperands);
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unsigned RCID = Desc.OpInfo[OpNo].RegClass;
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return getRegBitWidth(MRI->getRegClass(RCID)) / 8;
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}
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