forked from OSchip/llvm-project
[X86] Use getUnpackl helper to create an ISD::VECTOR_SHUFFLE instead of using X86ISD::UNPCKL in reduceVMULWidth.
This runs fairly early, we should use target independent nodes if possible. llvm-svn: 311873
This commit is contained in:
parent
2c77011d15
commit
33681161c4
|
@ -31373,7 +31373,7 @@ static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
|
||||||
// Repack the lower part and higher part result of mul into a wider
|
// Repack the lower part and higher part result of mul into a wider
|
||||||
// result. Make sure the type of mul result is VT.
|
// result. Make sure the type of mul result is VT.
|
||||||
MVT ResVT = MVT::getVectorVT(MVT::i32, RegSize / 32);
|
MVT ResVT = MVT::getVectorVT(MVT::i32, RegSize / 32);
|
||||||
SDValue Res = DAG.getNode(X86ISD::UNPCKL, DL, OpsVT, MulLo, MulHi);
|
SDValue Res = getUnpackl(DAG, DL, OpsVT, MulLo, MulHi);
|
||||||
Res = DAG.getNode(ISD::BITCAST, DL, ResVT, Res);
|
Res = DAG.getNode(ISD::BITCAST, DL, ResVT, Res);
|
||||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res,
|
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res,
|
||||||
DAG.getIntPtrConstant(0, DL));
|
DAG.getIntPtrConstant(0, DL));
|
||||||
|
|
Loading…
Reference in New Issue