forked from OSchip/llvm-project
parent
3aa5225d5e
commit
330ca97700
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@ -1299,13 +1299,13 @@ let AddedComplexity = 20 in {
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(ins VR128:$src1, VR128:$src2),
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"movlhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set VR128:$dst,
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(v4f32 (movlhps VR128:$src1, VR128:$src2)))]>,
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(v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))]>,
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VEX_4V;
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def VMOVHLPSrr : VPSI<0x12, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2),
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"movhlps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set VR128:$dst,
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(v4f32 (movhlps VR128:$src1, VR128:$src2)))]>,
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(v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))]>,
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VEX_4V;
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}
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let Constraints = "$src1 = $dst", AddedComplexity = 20 in {
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@ -1313,76 +1313,34 @@ let Constraints = "$src1 = $dst", AddedComplexity = 20 in {
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(ins VR128:$src1, VR128:$src2),
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"movlhps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v4f32 (movlhps VR128:$src1, VR128:$src2)))]>;
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(v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))]>;
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def MOVHLPSrr : PSI<0x12, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2),
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"movhlps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v4f32 (movhlps VR128:$src1, VR128:$src2)))]>;
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(v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))]>;
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}
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let Predicates = [HasAVX] in {
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// MOVLHPS patterns
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let AddedComplexity = 20 in {
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// vector_shuffle v1, v2 <0, 1, 4, 5> using MOVLHPS
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def : Pat<(v4i32 (movlhps VR128:$src1, VR128:$src2)),
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(VMOVLHPSrr VR128:$src1, VR128:$src2)>;
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}
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def : Pat<(v4f32 (X86Movlhps VR128:$src1, VR128:$src2)),
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(VMOVLHPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v4i32 (X86Movlhps VR128:$src1, VR128:$src2)),
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(VMOVLHPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v2i64 (X86Movlhps VR128:$src1, VR128:$src2)),
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(VMOVLHPSrr (v2i64 VR128:$src1), VR128:$src2)>;
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// MOVHLPS patterns
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let AddedComplexity = 20 in {
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// vector_shuffle v1, v2 <6, 7, 2, 3> using MOVHLPS
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def : Pat<(v4i32 (movhlps VR128:$src1, VR128:$src2)),
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(VMOVHLPSrr VR128:$src1, VR128:$src2)>;
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// vector_shuffle v1, undef <2, ?, ?, ?> using MOVHLPS
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def : Pat<(v4f32 (movhlps_undef VR128:$src1, (undef))),
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(VMOVHLPSrr VR128:$src1, VR128:$src1)>;
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def : Pat<(v4i32 (movhlps_undef VR128:$src1, (undef))),
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(VMOVHLPSrr VR128:$src1, VR128:$src1)>;
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}
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def : Pat<(v4f32 (X86Movhlps VR128:$src1, VR128:$src2)),
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(VMOVHLPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v4i32 (X86Movhlps VR128:$src1, VR128:$src2)),
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(VMOVHLPSrr VR128:$src1, VR128:$src2)>;
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}
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let Predicates = [HasSSE1] in {
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// MOVLHPS patterns
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let AddedComplexity = 20 in {
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// vector_shuffle v1, v2 <0, 1, 4, 5> using MOVLHPS
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def : Pat<(v4i32 (movlhps VR128:$src1, VR128:$src2)),
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(MOVLHPSrr VR128:$src1, VR128:$src2)>;
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}
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def : Pat<(v4f32 (X86Movlhps VR128:$src1, VR128:$src2)),
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(MOVLHPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v4i32 (X86Movlhps VR128:$src1, VR128:$src2)),
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(MOVLHPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v2i64 (X86Movlhps VR128:$src1, VR128:$src2)),
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(MOVLHPSrr (v2i64 VR128:$src1), VR128:$src2)>;
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// MOVHLPS patterns
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let AddedComplexity = 20 in {
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// vector_shuffle v1, v2 <6, 7, 2, 3> using MOVHLPS
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def : Pat<(v4i32 (movhlps VR128:$src1, VR128:$src2)),
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(MOVHLPSrr VR128:$src1, VR128:$src2)>;
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// vector_shuffle v1, undef <2, ?, ?, ?> using MOVHLPS
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def : Pat<(v4f32 (movhlps_undef VR128:$src1, (undef))),
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(MOVHLPSrr VR128:$src1, VR128:$src1)>;
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def : Pat<(v4i32 (movhlps_undef VR128:$src1, (undef))),
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(MOVHLPSrr VR128:$src1, VR128:$src1)>;
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}
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def : Pat<(v4f32 (X86Movhlps VR128:$src1, VR128:$src2)),
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(MOVHLPSrr VR128:$src1, VR128:$src2)>;
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def : Pat<(v4i32 (X86Movhlps VR128:$src1, VR128:$src2)),
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(MOVHLPSrr VR128:$src1, VR128:$src2)>;
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}
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