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AMDGPU: Use DFS to avoid second loop over function 

llvm-svn: 245772
This commit is contained in:
Matt Arsenault 2015-08-22 00:43:38 +00:00
parent ee04aebbdb
commit 33010103b7
1 changed files with 13 additions and 15 deletions
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28
llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp
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@ -47,6 +47,7 @@
#include "AMDGPU.h" #include "AMDGPU.h"
#include "SIInstrInfo.h" #include "SIInstrInfo.h"
#include "SIRegisterInfo.h" #include "SIRegisterInfo.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunctionPass.h"
@ -119,10 +120,13 @@ bool SIFixSGPRLiveRanges::runOnMachineFunction(MachineFunction &MF) {
LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
MachineBasicBlock *Entry = MF.begin();
// First pass, collect all live intervals for SGPRs // Use a depth first order so that in SSA, we encounter all defs before
for (const MachineBasicBlock &MBB : MF) { // uses. Once the defs of the block have been found, attempt to insert
for (const MachineInstr &MI : MBB) { // SGPR_USE instructions in successor blocks if required.
for (MachineBasicBlock *MBB : depth_first(Entry)) {
for (const MachineInstr &MI : *MBB) {
for (const MachineOperand &MO : MI.defs()) { for (const MachineOperand &MO : MI.defs()) {
if (MO.isImplicit()) if (MO.isImplicit())
continue; continue;
@ -132,29 +136,23 @@ bool SIFixSGPRLiveRanges::runOnMachineFunction(MachineFunction &MF) {
// Only consider defs that are live outs. We don't care about def / // Only consider defs that are live outs. We don't care about def /
// use within the same block. // use within the same block.
LiveRange &LR = LIS->getInterval(Def); LiveRange &LR = LIS->getInterval(Def);
if (LIS->isLiveOutOfMBB(LR, &MBB)) if (LIS->isLiveOutOfMBB(LR, MBB))
SGPRLiveRanges.push_back(std::make_pair(Def, &LR)); SGPRLiveRanges.push_back(std::make_pair(Def, &LR));
} }
} else if (TRI->isSGPRClass(TRI->getPhysRegClass(Def))) { } else if (TRI->isSGPRClass(TRI->getPhysRegClass(Def))) {
SGPRLiveRanges.push_back( SGPRLiveRanges.push_back(std::make_pair(Def, &LIS->getRegUnit(Def)));
std::make_pair(Def, &LIS->getRegUnit(Def)));
} }
} }
} }
}
// Second pass fix the intervals if (MBB->succ_size() < 2)
for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
BI != BE; ++BI) {
MachineBasicBlock &MBB = *BI;
if (MBB.succ_size() < 2)
continue; continue;
// We have structured control flow, so the number of successors should be // We have structured control flow, so the number of successors should be
// two. // two.
assert(MBB.succ_size() == 2); assert(MBB->succ_size() == 2);
MachineBasicBlock *SuccA = *MBB.succ_begin(); MachineBasicBlock *SuccA = *MBB->succ_begin();
MachineBasicBlock *SuccB = *(++MBB.succ_begin()); MachineBasicBlock *SuccB = *(++MBB->succ_begin());
MachineBasicBlock *NCD = PDT->findNearestCommonDominator(SuccA, SuccB); MachineBasicBlock *NCD = PDT->findNearestCommonDominator(SuccA, SuccB);
if (!NCD) if (!NCD)