forked from OSchip/llvm-project
parent
118a9e4813
commit
32d4b5a44e
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@ -0,0 +1,19 @@
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; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
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; RUN: grep seh %t | count 1
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; RUN: grep seb %t | count 1
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "mipsallegrexel-psp-elf"
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define i8 @A(i8 %e.0, i8 signext %sum) signext nounwind {
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entry:
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add i8 %sum, %e.0 ; <i8>:0 [#uses=1]
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ret i8 %0
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}
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define i16 @B(i16 %e.0, i16 signext %sum) signext nounwind {
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entry:
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add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
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ret i16 %0
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}
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@ -0,0 +1,12 @@
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; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
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; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2
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; RUN: grep {rodata.cst4,"aM",@progbits} %t | count 1
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "mipsallegrexel-psp-elf"
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define float @F(float %a) nounwind {
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entry:
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add float %a, 0x4011333340000000 ; <float>:0 [#uses=1]
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add float %0, 0x4010666660000000 ; <float>:1 [#uses=1]
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ret float %1
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}
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@ -0,0 +1,34 @@
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; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
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; RUN: grep {c\\..*\\.s} %t | count 3
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; RUN: grep {bc1\[tf\]} %t | count 3
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "mipsallegrexel-psp-elf"
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define float @A(float %a, float %b) nounwind {
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entry:
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fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
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br i1 %0, label %bb, label %bb2
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bb: ; preds = %entry
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add float %a, 1.000000e+00 ; <float>:1 [#uses=1]
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ret float %1
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bb2: ; preds = %entry
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ret float %b
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}
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define float @B(float %a, float %b) nounwind {
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entry:
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fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
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%.0 = select i1 %0, float %a, float %b ; <float> [#uses=1]
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ret float %.0
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}
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define i32 @C(i32 %a, i32 %b, float %j) nounwind {
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entry:
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fcmp ogt float %j, 1.000000e+00 ; <i1>:0 [#uses=1]
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%.0 = select i1 %0, i32 %a, i32 %b ; <i32> [#uses=1]
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ret i32 %.0
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}
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