diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index 671f7e90b357..95257b919178 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -390,8 +390,10 @@ bool MipsFastISel::computeAddress(const Value *Obj, Address &Addr) { Opcode = I->getOpcode(); U = I; } - } else if (isa(Obj)) - return false; + } else if (const ConstantExpr *C = dyn_cast(Obj)) { + Opcode = C->getOpcode(); + U = C; + } switch (Opcode) { default: break; diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll b/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll new file mode 100644 index 000000000000..df60d8071836 --- /dev/null +++ b/llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \ +; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s +; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \ +; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s + +@ARR = external global [10 x i32], align 4 + +define void @foo() { +; CHECK-LABEL: foo + +; CHECK-DAG: lw $[[ARR:[0-9]+]], %got(ARR)({{.*}}) +; CHECK-DAG: addiu $[[T0:[0-9]+]], $zero, 12345 +; CHECK: sw $[[T0]], 8($[[ARR]]) + +entry: + store i32 12345, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @ARR, i32 0, i32 2), align 4 + ret void +}