diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 5168e2a113ca..35a0bbb76146 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -464,9 +464,12 @@ Instruction *InstCombiner::visitUDiv(BinaryOperator &I) {
 
   // X udiv (C1 << N), where C1 is "1<<C2"  -->  X >> (N+C2)
   { const APInt *CI; Value *N;
-    if (match(Op1, m_Shl(m_Power2(CI), m_Value(N)))) {
+    if (match(Op1, m_Shl(m_Power2(CI), m_Value(N))) ||
+        match(Op1, m_ZExt(m_Shl(m_Power2(CI), m_Value(N))))) {
       if (*CI != 1)
         N = Builder->CreateAdd(N, ConstantInt::get(I.getType(),CI->logBase2()));
+      if (ZExtInst *Z = dyn_cast<ZExtInst>(Op1))
+        N = Builder->CreateZExt(N, Z->getDestTy());
       if (I.isExact())
         return BinaryOperator::CreateExactLShr(Op0, N);
       return BinaryOperator::CreateLShr(Op0, N);
diff --git a/llvm/test/Transforms/InstCombine/div-shift.ll b/llvm/test/Transforms/InstCombine/div-shift.ll
new file mode 100644
index 000000000000..a07f3ea94914
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/div-shift.ll
@@ -0,0 +1,23 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @t1(i16 zeroext %x, i32 %y) nounwind {
+entry:
+; CHECK: t1
+; CHECK-NOT: sdiv
+; CHECK: lshr i32 %conv
+  %conv = zext i16 %x to i32
+  %s = shl i32 2, %y
+  %d = sdiv i32 %conv, %s
+  ret i32 %d
+}
+
+; rdar://11721329
+define i64 @t2(i64 %x, i32 %y) nounwind  {
+; CHECK: t2
+; CHECK-NOT: udiv
+; CHECK: lshr i64 %x
+  %1 = shl i32 1, %y
+  %2 = zext i32 %1 to i64
+  %3 = udiv i64 %x, %2
+  ret i64 %3
+}
diff --git a/llvm/test/Transforms/InstCombine/sdiv-shift.ll b/llvm/test/Transforms/InstCombine/sdiv-shift.ll
deleted file mode 100644
index f4d2b36cbbf8..000000000000
--- a/llvm/test/Transforms/InstCombine/sdiv-shift.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: opt < %s -instcombine -S | not grep div
-
-define i32 @a(i16 zeroext %x, i32 %y) nounwind {
-entry:
-	%conv = zext i16 %x to i32
-	%s = shl i32 2, %y
-	%d = sdiv i32 %conv, %s
-	ret i32 %d
-}