forked from OSchip/llvm-project
parent
c47de41e02
commit
32c5406dcf
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@ -5668,25 +5668,25 @@ LowerVECTOR_SHUFFLEtoBlend(ShuffleVectorSDNode *SVOp,
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// Check the mask for BLEND and build the value.
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unsigned MaskValue = 0;
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// There are 2 lanes if (NumElems > 8), and 1 lane otherwise.
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unsigned NumLanes = (NumElems-1)/8 + 1;
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unsigned NumLanes = (NumElems-1)/8 + 1;
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unsigned NumElemsInLane = NumElems / NumLanes;
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// Blend for v16i16 should be symetric for the both lanes.
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for (unsigned i = 0; i < NumElemsInLane; ++i) {
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int SndLaneEltIdx = (NumLanes == 2) ?
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int SndLaneEltIdx = (NumLanes == 2) ?
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SVOp->getMaskElt(i + NumElemsInLane) : -1;
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int EltIdx = SVOp->getMaskElt(i);
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if ((EltIdx == -1 || EltIdx == (int)i) &&
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if ((EltIdx == -1 || EltIdx == (int)i) &&
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(SndLaneEltIdx == -1 || SndLaneEltIdx == (int)(i + NumElemsInLane)))
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continue;
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if (((unsigned)EltIdx == (i + NumElems)) &&
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(SndLaneEltIdx == -1 ||
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if (((unsigned)EltIdx == (i + NumElems)) &&
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(SndLaneEltIdx == -1 ||
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(unsigned)SndLaneEltIdx == i + NumElems + NumElemsInLane))
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MaskValue |= (1<<i);
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else
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else
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return SDValue();
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}
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@ -5694,13 +5694,13 @@ LowerVECTOR_SHUFFLEtoBlend(ShuffleVectorSDNode *SVOp,
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// AVX2 introduced VPBLENDD instruction for 128 and 256-bit vectors.
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EVT BlendVT = VT;
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if (EltVT == MVT::i64 || (EltVT == MVT::i32 && !Subtarget->hasInt256())) {
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BlendVT = EVT::getVectorVT(*DAG.getContext(),
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EVT::getFloatingPointVT(EltVT.getSizeInBits()),
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BlendVT = EVT::getVectorVT(*DAG.getContext(),
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EVT::getFloatingPointVT(EltVT.getSizeInBits()),
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NumElems);
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V1 = DAG.getNode(ISD::BITCAST, dl, VT, V1);
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V2 = DAG.getNode(ISD::BITCAST, dl, VT, V2);
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}
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SDValue Ret = DAG.getNode(X86ISD::BLENDI, dl, BlendVT, V1, V2,
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DAG.getConstant(MaskValue, MVT::i32));
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return DAG.getNode(ISD::BITCAST, dl, VT, Ret);
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