forked from OSchip/llvm-project
[X86] Remove several bad load folding isel patterns for VPMOVZX/VPMOVSX.
These patterns all matched a v2i64 vzload which only loads 64-bits to instructions that load a full 128-bits. llvm-svn: 364847
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@ -9692,20 +9692,14 @@ multiclass AVX512_pmovx_patterns_base<string OpcPrefix, SDNode ExtOp> {
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let Predicates = [HasVLX, HasBWI] in {
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def : Pat<(v16i16 (ExtOp (loadv16i8 addr:$src))),
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(!cast<I>(OpcPrefix#BWZ256rm) addr:$src)>;
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def : Pat<(v16i16 (ExtOp (v16i8 (vzload_v2i64 addr:$src)))),
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(!cast<I>(OpcPrefix#BWZ256rm) addr:$src)>;
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}
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let Predicates = [HasVLX] in {
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def : Pat<(v8i32 (ExtOp (loadv8i16 addr:$src))),
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(!cast<I>(OpcPrefix#WDZ256rm) addr:$src)>;
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def : Pat<(v8i32 (ExtOp (v8i16 (vzload_v2i64 addr:$src)))),
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(!cast<I>(OpcPrefix#WDZ256rm) addr:$src)>;
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def : Pat<(v4i64 (ExtOp (loadv4i32 addr:$src))),
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(!cast<I>(OpcPrefix#DQZ256rm) addr:$src)>;
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def : Pat<(v4i64 (ExtOp (v4i32 (vzload_v2i64 addr:$src)))),
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(!cast<I>(OpcPrefix#DQZ256rm) addr:$src)>;
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}
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// 512-bit patterns
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@ -4928,8 +4928,6 @@ multiclass SS41I_pmovx_avx2_patterns<string OpcPrefix, string ExtTy,
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def : Pat<(v16i16 (ExtOp (loadv16i8 addr:$src))),
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(!cast<I>(OpcPrefix#BWYrm) addr:$src)>;
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def : Pat<(v16i16 (ExtOp (v16i8 (vzload_v2i64 addr:$src)))),
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(!cast<I>(OpcPrefix#BWYrm) addr:$src)>;
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}
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let Predicates = [HasAVX2, NoVLX] in {
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@ -4951,8 +4949,6 @@ multiclass SS41I_pmovx_avx2_patterns<string OpcPrefix, string ExtTy,
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let Predicates = [HasAVX2, NoVLX] in {
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def : Pat<(v8i32 (ExtOp (loadv8i16 addr:$src))),
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(!cast<I>(OpcPrefix#WDYrm) addr:$src)>;
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def : Pat<(v8i32 (ExtOp (v8i16 (vzload_v2i64 addr:$src)))),
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(!cast<I>(OpcPrefix#WDYrm) addr:$src)>;
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def : Pat<(v8i32 (InVecOp (bc_v16i8 (v2i64 (scalar_to_vector (loadi64 addr:$src)))))),
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(!cast<I>(OpcPrefix#BDYrm) addr:$src)>;
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@ -4963,8 +4959,6 @@ multiclass SS41I_pmovx_avx2_patterns<string OpcPrefix, string ExtTy,
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def : Pat<(v4i64 (ExtOp (loadv4i32 addr:$src))),
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(!cast<I>(OpcPrefix#DQYrm) addr:$src)>;
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def : Pat<(v4i64 (ExtOp (v4i32 (vzload_v2i64 addr:$src)))),
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(!cast<I>(OpcPrefix#DQYrm) addr:$src)>;
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def : Pat<(v4i64 (InVecOp (bc_v16i8 (v4i32 (scalar_to_vector (loadi32 addr:$src)))))),
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(!cast<I>(OpcPrefix#BQYrm) addr:$src)>;
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