forked from OSchip/llvm-project
[X86] Split imm handling out of selectMOV64Imm32 and add a separate isel pattern.
This makes the pattern available to global isel.
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c76a1d0fc0
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324e13668e
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@ -2479,15 +2479,6 @@ bool X86DAGToDAGISel::selectAddr(SDNode *Parent, SDValue N, SDValue &Base,
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}
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bool X86DAGToDAGISel::selectMOV64Imm32(SDValue N, SDValue &Imm) {
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if (const ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N)) {
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uint64_t ImmVal = CN->getZExtValue();
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if (!isUInt<32>(ImmVal))
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return false;
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Imm = CurDAG->getTargetConstant(ImmVal, SDLoc(N), MVT::i64);
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return true;
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}
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// In static codegen with small code model, we can get the address of a label
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// into a register with 'movl'
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if (N->getOpcode() != X86ISD::Wrapper)
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@ -318,15 +318,14 @@ def MOV64ImmSExti8 : I<0, Pseudo, (outs GR64:$dst), (ins i64i8imm:$src), "",
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// Materialize i64 constant where top 32-bits are zero. This could theoretically
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// use MOV32ri with a SUBREG_TO_REG to represent the zero-extension, however
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// that would make it more difficult to rematerialize.
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let isReMaterializable = 1, isAsCheapAsAMove = 1,
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isPseudo = 1, hasSideEffects = 0, SchedRW = [WriteMove] in
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def MOV32ri64 : I<0, Pseudo, (outs GR64:$dst), (ins i64i32imm:$src), "", []>;
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// This 64-bit pseudo-move can be used for both a 64-bit constant that is
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// actually the zero-extension of a 32-bit constant and for labels in the
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// x86-64 small code model.
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def mov64imm32 : ComplexPattern<i64, 1, "selectMOV64Imm32", [imm, X86Wrapper]>;
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let AddedComplexity = 1, isReMaterializable = 1, isAsCheapAsAMove = 1,
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isPseudo = 1, SchedRW = [WriteMove] in
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def MOV32ri64 : I<0, Pseudo, (outs GR64:$dst), (ins i64i32imm:$src), "",
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[(set GR64:$dst, i64immZExt32:$src)]>;
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// This 64-bit pseudo-move can also be used for labels in the x86-64 small code
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// model.
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def mov64imm32 : ComplexPattern<i64, 1, "selectMOV64Imm32", [X86Wrapper]>;
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def : Pat<(i64 mov64imm32:$src), (MOV32ri64 mov64imm32:$src)>;
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// Use sbb to materialize carry bit.
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@ -37,7 +37,7 @@ define i64 @const_i64() {
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define i64 @const_i64_u32() {
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; ALL-LABEL: const_i64_u32:
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; ALL: # %bb.0:
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; ALL-NEXT: movq $1879048192, %rax # imm = 0x70000000
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; ALL-NEXT: movl $1879048192, %eax # imm = 0x70000000
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; ALL-NEXT: retq
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ret i64 1879048192
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}
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@ -25,7 +25,7 @@ define i32* @test_gep_i8(i32 *%arr, i8 %ind) {
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define i32* @test_gep_i8_const(i32 *%arr) {
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; X64_GISEL-LABEL: test_gep_i8_const:
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; X64_GISEL: # %bb.0:
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; X64_GISEL-NEXT: movq $80, %rax
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; X64_GISEL-NEXT: movl $80, %eax
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; X64_GISEL-NEXT: addq %rdi, %rax
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; X64_GISEL-NEXT: retq
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;
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@ -60,7 +60,7 @@ define i32* @test_gep_i16(i32 *%arr, i16 %ind) {
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define i32* @test_gep_i16_const(i32 *%arr) {
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; X64_GISEL-LABEL: test_gep_i16_const:
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; X64_GISEL: # %bb.0:
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; X64_GISEL-NEXT: movq $80, %rax
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; X64_GISEL-NEXT: movl $80, %eax
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; X64_GISEL-NEXT: addq %rdi, %rax
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; X64_GISEL-NEXT: retq
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;
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@ -92,7 +92,7 @@ define i32* @test_gep_i32(i32 *%arr, i32 %ind) {
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define i32* @test_gep_i32_const(i32 *%arr) {
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; X64_GISEL-LABEL: test_gep_i32_const:
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; X64_GISEL: # %bb.0:
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; X64_GISEL-NEXT: movq $20, %rax
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; X64_GISEL-NEXT: movl $20, %eax
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; X64_GISEL-NEXT: addq %rdi, %rax
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; X64_GISEL-NEXT: retq
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;
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@ -122,7 +122,7 @@ define i32* @test_gep_i64(i32 *%arr, i64 %ind) {
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define i32* @test_gep_i64_const(i32 *%arr) {
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; X64_GISEL-LABEL: test_gep_i64_const:
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; X64_GISEL: # %bb.0:
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; X64_GISEL-NEXT: movq $20, %rax
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; X64_GISEL-NEXT: movl $20, %eax
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; X64_GISEL-NEXT: addq %rdi, %rax
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; X64_GISEL-NEXT: retq
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;
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@ -136,8 +136,8 @@ registers:
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i64_u32
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; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 1879048192
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; CHECK: $rax = COPY [[MOV64ri32_]]
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; CHECK: [[MOV32ri64_:%[0-9]+]]:gr64 = MOV32ri64 1879048192
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; CHECK: $rax = COPY [[MOV32ri64_]]
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; CHECK: RET 0, implicit $rax
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%0(s64) = G_CONSTANT i64 1879048192
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$rax = COPY %0(s64)
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@ -23,8 +23,8 @@ body: |
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; CHECK-LABEL: name: test_gep_i32
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; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
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; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64_nosp = MOV64ri32 20
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; CHECK: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri32_]], 0, $noreg
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; CHECK: [[MOV32ri64_:%[0-9]+]]:gr64_nosp = MOV32ri64 20
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; CHECK: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV32ri64_]], 0, $noreg
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; CHECK: $rax = COPY [[LEA64r]]
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; CHECK: RET 0, implicit $rax
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%0(p0) = COPY $rdi
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