[X86] Split imm handling out of selectMOV64Imm32 and add a separate isel pattern.

This makes the pattern available to global isel.
This commit is contained in:
Craig Topper 2020-06-10 10:36:45 -07:00
parent c76a1d0fc0
commit 324e13668e
6 changed files with 16 additions and 26 deletions

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@ -2479,15 +2479,6 @@ bool X86DAGToDAGISel::selectAddr(SDNode *Parent, SDValue N, SDValue &Base,
}
bool X86DAGToDAGISel::selectMOV64Imm32(SDValue N, SDValue &Imm) {
if (const ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N)) {
uint64_t ImmVal = CN->getZExtValue();
if (!isUInt<32>(ImmVal))
return false;
Imm = CurDAG->getTargetConstant(ImmVal, SDLoc(N), MVT::i64);
return true;
}
// In static codegen with small code model, we can get the address of a label
// into a register with 'movl'
if (N->getOpcode() != X86ISD::Wrapper)

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@ -318,15 +318,14 @@ def MOV64ImmSExti8 : I<0, Pseudo, (outs GR64:$dst), (ins i64i8imm:$src), "",
// Materialize i64 constant where top 32-bits are zero. This could theoretically
// use MOV32ri with a SUBREG_TO_REG to represent the zero-extension, however
// that would make it more difficult to rematerialize.
let isReMaterializable = 1, isAsCheapAsAMove = 1,
isPseudo = 1, hasSideEffects = 0, SchedRW = [WriteMove] in
def MOV32ri64 : I<0, Pseudo, (outs GR64:$dst), (ins i64i32imm:$src), "", []>;
// This 64-bit pseudo-move can be used for both a 64-bit constant that is
// actually the zero-extension of a 32-bit constant and for labels in the
// x86-64 small code model.
def mov64imm32 : ComplexPattern<i64, 1, "selectMOV64Imm32", [imm, X86Wrapper]>;
let AddedComplexity = 1, isReMaterializable = 1, isAsCheapAsAMove = 1,
isPseudo = 1, SchedRW = [WriteMove] in
def MOV32ri64 : I<0, Pseudo, (outs GR64:$dst), (ins i64i32imm:$src), "",
[(set GR64:$dst, i64immZExt32:$src)]>;
// This 64-bit pseudo-move can also be used for labels in the x86-64 small code
// model.
def mov64imm32 : ComplexPattern<i64, 1, "selectMOV64Imm32", [X86Wrapper]>;
def : Pat<(i64 mov64imm32:$src), (MOV32ri64 mov64imm32:$src)>;
// Use sbb to materialize carry bit.

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@ -37,7 +37,7 @@ define i64 @const_i64() {
define i64 @const_i64_u32() {
; ALL-LABEL: const_i64_u32:
; ALL: # %bb.0:
; ALL-NEXT: movq $1879048192, %rax # imm = 0x70000000
; ALL-NEXT: movl $1879048192, %eax # imm = 0x70000000
; ALL-NEXT: retq
ret i64 1879048192
}

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@ -25,7 +25,7 @@ define i32* @test_gep_i8(i32 *%arr, i8 %ind) {
define i32* @test_gep_i8_const(i32 *%arr) {
; X64_GISEL-LABEL: test_gep_i8_const:
; X64_GISEL: # %bb.0:
; X64_GISEL-NEXT: movq $80, %rax
; X64_GISEL-NEXT: movl $80, %eax
; X64_GISEL-NEXT: addq %rdi, %rax
; X64_GISEL-NEXT: retq
;
@ -60,7 +60,7 @@ define i32* @test_gep_i16(i32 *%arr, i16 %ind) {
define i32* @test_gep_i16_const(i32 *%arr) {
; X64_GISEL-LABEL: test_gep_i16_const:
; X64_GISEL: # %bb.0:
; X64_GISEL-NEXT: movq $80, %rax
; X64_GISEL-NEXT: movl $80, %eax
; X64_GISEL-NEXT: addq %rdi, %rax
; X64_GISEL-NEXT: retq
;
@ -92,7 +92,7 @@ define i32* @test_gep_i32(i32 *%arr, i32 %ind) {
define i32* @test_gep_i32_const(i32 *%arr) {
; X64_GISEL-LABEL: test_gep_i32_const:
; X64_GISEL: # %bb.0:
; X64_GISEL-NEXT: movq $20, %rax
; X64_GISEL-NEXT: movl $20, %eax
; X64_GISEL-NEXT: addq %rdi, %rax
; X64_GISEL-NEXT: retq
;
@ -122,7 +122,7 @@ define i32* @test_gep_i64(i32 *%arr, i64 %ind) {
define i32* @test_gep_i64_const(i32 *%arr) {
; X64_GISEL-LABEL: test_gep_i64_const:
; X64_GISEL: # %bb.0:
; X64_GISEL-NEXT: movq $20, %rax
; X64_GISEL-NEXT: movl $20, %eax
; X64_GISEL-NEXT: addq %rdi, %rax
; X64_GISEL-NEXT: retq
;

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@ -136,8 +136,8 @@ registers:
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i64_u32
; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 1879048192
; CHECK: $rax = COPY [[MOV64ri32_]]
; CHECK: [[MOV32ri64_:%[0-9]+]]:gr64 = MOV32ri64 1879048192
; CHECK: $rax = COPY [[MOV32ri64_]]
; CHECK: RET 0, implicit $rax
%0(s64) = G_CONSTANT i64 1879048192
$rax = COPY %0(s64)

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@ -23,8 +23,8 @@ body: |
; CHECK-LABEL: name: test_gep_i32
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64_nosp = MOV64ri32 20
; CHECK: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri32_]], 0, $noreg
; CHECK: [[MOV32ri64_:%[0-9]+]]:gr64_nosp = MOV32ri64 20
; CHECK: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV32ri64_]], 0, $noreg
; CHECK: $rax = COPY [[LEA64r]]
; CHECK: RET 0, implicit $rax
%0(p0) = COPY $rdi