forked from OSchip/llvm-project
Remove leftovers from a non-MC asm printer.
llvm-svn: 196068
This commit is contained in:
parent
8473259602
commit
321f55ae9f
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@ -61,17 +61,6 @@ static cl::opt<bool> AlignCalls(
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"hexagon-align-calls", cl::Hidden, cl::init(true),
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cl::desc("Insert falign after call instruction for Hexagon target"));
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void HexagonAsmPrinter::EmitAlignment(unsigned NumBits,
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const GlobalValue *GV) const {
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// For basic block level alignment, use ".falign".
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if (!GV) {
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OutStreamer.EmitRawText(StringRef("\t.falign"));
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return;
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}
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AsmPrinter::EmitAlignment(NumBits, GV);
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}
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void HexagonAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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@ -186,12 +175,6 @@ bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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return false;
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}
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void HexagonAsmPrinter::printPredicateOperand(const MachineInstr *MI,
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unsigned OpNo,
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raw_ostream &O) {
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llvm_unreachable("Unimplemented");
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}
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/// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
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/// the current output stream.
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@ -240,60 +223,6 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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return;
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}
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/// PrintUnmangledNameSafely - Print out the printable characters in the name.
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/// Don't print things like \n or \0.
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// static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
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// for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
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// Name != E; ++Name)
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// if (isprint(*Name))
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// OS << *Name;
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// }
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void HexagonAsmPrinter::printAddrModeBasePlusOffset(const MachineInstr *MI,
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int OpNo, raw_ostream &O) {
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const MachineOperand &MO1 = MI->getOperand(OpNo);
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const MachineOperand &MO2 = MI->getOperand(OpNo+1);
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O << HexagonInstPrinter::getRegisterName(MO1.getReg())
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<< " + #"
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<< MO2.getImm();
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}
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void HexagonAsmPrinter::printGlobalOperand(const MachineInstr *MI, int OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert( (MO.getType() == MachineOperand::MO_GlobalAddress) &&
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"Expecting global address");
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O << *getSymbol(MO.getGlobal());
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if (MO.getOffset() != 0) {
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O << " + ";
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O << MO.getOffset();
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}
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}
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void HexagonAsmPrinter::printJumpTable(const MachineInstr *MI, int OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert( (MO.getType() == MachineOperand::MO_JumpTableIndex) &&
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"Expecting jump table index");
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// Hexagon_TODO: Do we need name mangling?
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O << *GetJTISymbol(MO.getIndex());
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}
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void HexagonAsmPrinter::printConstantPool(const MachineInstr *MI, int OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert( (MO.getType() == MachineOperand::MO_ConstantPoolIndex) &&
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"Expecting constant pool index");
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// Hexagon_TODO: Do we need name mangling?
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O << *GetCPISymbol(MO.getIndex());
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}
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static MCInstPrinter *createHexagonMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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@ -37,8 +37,6 @@ namespace llvm {
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bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
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virtual void EmitInstruction(const MachineInstr *MI);
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virtual void EmitAlignment(unsigned NumBits,
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const GlobalValue *GV = 0) const;
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void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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@ -48,101 +46,6 @@ namespace llvm {
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &OS);
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// void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, raw_ostream &O);
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/// printRegister - Print register according to target requirements.
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///
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void printRegister(const MachineOperand &MO, bool R0AsZero,
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raw_ostream &O) {
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unsigned RegNo = MO.getReg();
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assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??");
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O << getRegisterName(RegNo);
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}
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void printImmOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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int value = MI->getOperand(OpNo).getImm();
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O << value;
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}
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void printNegImmOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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int value = MI->getOperand(OpNo).getImm();
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O << -value;
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}
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void printMEMriOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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const MachineOperand &MO1 = MI->getOperand(OpNo);
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const MachineOperand &MO2 = MI->getOperand(OpNo+1);
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O << getRegisterName(MO1.getReg())
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<< " + #"
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<< (int) MO2.getImm();
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}
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void printFrameIndexOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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const MachineOperand &MO1 = MI->getOperand(OpNo);
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const MachineOperand &MO2 = MI->getOperand(OpNo+1);
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O << getRegisterName(MO1.getReg())
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<< ", #"
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<< MO2.getImm();
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}
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void printBranchOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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// Branches can take an immediate operand. This is used by the branch
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// selection pass to print $+8, an eight byte displacement from the PC.
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if (MI->getOperand(OpNo).isImm()) {
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O << "$+" << MI->getOperand(OpNo).getImm()*4;
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} else {
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printOp(MI->getOperand(OpNo), O);
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}
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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}
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void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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}
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void printSymbolHi(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
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O << "#HI(";
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if (MI->getOperand(OpNo).isImm()) {
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printImmOperand(MI, OpNo, O);
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}
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else {
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printOp(MI->getOperand(OpNo), O);
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}
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O << ")";
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}
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void printSymbolLo(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
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O << "#HI(";
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if (MI->getOperand(OpNo).isImm()) {
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printImmOperand(MI, OpNo, O);
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}
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else {
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printOp(MI->getOperand(OpNo), O);
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}
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O << ")";
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}
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void printPredicateOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O);
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void printAddrModeBasePlusOffset(const MachineInstr *MI, int OpNo,
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raw_ostream &O);
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void printGlobalOperand(const MachineInstr *MI, int OpNo, raw_ostream &O);
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void printJumpTable(const MachineInstr *MI, int OpNo, raw_ostream &O);
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void printConstantPool(const MachineInstr *MI, int OpNo, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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};
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