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Fix build errors introduced by r349712 on aarch64 bots. 

llvm-svn: 349723
This commit is contained in:
Amara Emerson 2018-12-20 03:27:42 +00:00
parent 21ea152b4c
commit 321bfb210a
2 changed files with 6 additions and 7 deletions
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3
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
View File

@ -1625,10 +1625,9 @@ bool AArch64InstructionSelector::selectMergeValues(
.addImm(0) .addImm(0)
.addUse(I.getOperand(2).getReg()) .addUse(I.getOperand(2).getReg())
.addImm(AArch64::sub_32); .addImm(AArch64::sub_32);
unsigned BFMDef = MRI.createVirtualRegister(DstRC);
MachineInstr &BFM = MachineInstr &BFM =
*BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::BFMXri)) *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::BFMXri))
.addDef(BFMDef) .addDef(I.getOperand(0).getReg())
.addUse(SubToRegDef) .addUse(SubToRegDef)
.addUse(SubToRegDef2) .addUse(SubToRegDef2)
.addImm(32) .addImm(32)

10
llvm/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
View File

@ -21,12 +21,12 @@ body: |
liveins: $w0, $w1 liveins: $w0, $w1
; CHECK-LABEL: name: gmerge_s64_s32 ; CHECK-LABEL: name: gmerge_s64_s32
; CHECK: [[COPY:%[0-9]+]]:gpr32all(s32) = COPY $w0 ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY $w0
; CHECK: [[COPY1:%[0-9]+]]:gpr32all(s32) = COPY $w1 ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY $w1
; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]](s32), %subreg.sub_32 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32
; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]](s32), %subreg.sub_32 ; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_32
; CHECK: [[BFMXri:%[0-9]+]]:gpr64 = BFMXri [[SUBREG_TO_REG]], [[SUBREG_TO_REG1]], 32, 31 ; CHECK: [[BFMXri:%[0-9]+]]:gpr64 = BFMXri [[SUBREG_TO_REG]], [[SUBREG_TO_REG1]], 32, 31
; CHECK: $x0 = COPY %2:gpr(s64) ; CHECK: $x0 = COPY [[BFMXri]]
%0(s32) = COPY $w0 %0(s32) = COPY $w0
%1(s32) = COPY $w1 %1(s32) = COPY $w1
%2(s64) = G_MERGE_VALUES %0(s32), %1(s32) %2(s64) = G_MERGE_VALUES %0(s32), %1(s32)