forked from OSchip/llvm-project
[X86] Add test for PR39926; NFC
The test file shows a case where the avoid store forwarding block pass misses to copy a range (-1..1) when the load displacement changes sign. Baseline test for D55485. llvm-svn: 348712
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx | FileCheck %s
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define i8 @test_offset(i8* %base) {
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; CHECK-LABEL: test_offset:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movb $0, 7(%rdi)
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; CHECK-NEXT: movw $0, 5(%rdi)
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; CHECK-NEXT: movl $0, 1(%rdi)
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; CHECK-NEXT: movzwl -4(%rdi), %eax
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; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb -2(%rdi), %al
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; CHECK-NEXT: movb %al, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movl 1(%rdi), %eax
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; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movzwl 5(%rdi), %eax
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; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb 7(%rdi), %al
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; CHECK-NEXT: movb %al, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movl 8(%rdi), %eax
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; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb -{{[0-9]+}}(%rsp), %al
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%z = alloca [128 x i8], align 16
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%gep0 = getelementptr inbounds i8, i8* %base, i64 7
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store volatile i8 0, i8* %gep0
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%gep1 = getelementptr inbounds i8, i8* %base, i64 5
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%bc1 = bitcast i8* %gep1 to i16*
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store volatile i16 0, i16* %bc1
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%gep2 = getelementptr inbounds i8, i8* %base, i64 1
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%bc2 = bitcast i8* %gep2 to i32*
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store volatile i32 0, i32* %bc2
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%y1 = getelementptr inbounds i8, i8* %base, i64 -4
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%y2 = bitcast [128 x i8]* %z to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %y2, i8* %y1, i64 16, i1 false)
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%gep4 = getelementptr inbounds [128 x i8], [128 x i8]* %z, i64 0, i64 4
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%ret = load i8, i8* %gep4
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ret i8 %ret
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
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