Remove special Hexagon packet traversal code

On Hexagon, breakpoints need to be on the first instruction of a packet.
When the LLVM disassembler for Hexagon returned 32 bit instructions, we
needed code to find the start of the current packet. Now that the LLVM
disassembler for Hexagon returns packets instead of instructions, we always
have the first instruction of the packet. Remove the packet traversal code
because it can cause problems when the next packet has more than one
instruction.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D84966
This commit is contained in:
Ted Woodward 2020-07-30 13:37:43 -05:00
parent 3a3c9519e2
commit 3169d920cc
4 changed files with 5 additions and 53 deletions

View File

@ -279,9 +279,6 @@ public:
/// @param[in] start
/// The instruction index of the first instruction to check.
///
/// @param[in] target
/// A LLDB target object that is used to resolve addresses.
///
/// @param[in] ignore_calls
/// It true, then fine the first branch instruction that isn't
/// a function call (a branch that calls and returns to the next
@ -298,7 +295,6 @@ public:
/// found.
//------------------------------------------------------------------
uint32_t GetIndexOfNextBranchInstruction(uint32_t start,
Target &target,
bool ignore_calls,
bool *found_calls) const;

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@ -990,17 +990,15 @@ void InstructionList::Append(lldb::InstructionSP &inst_sp) {
uint32_t
InstructionList::GetIndexOfNextBranchInstruction(uint32_t start,
Target &target,
bool ignore_calls,
bool *found_calls) const {
size_t num_instructions = m_instructions.size();
uint32_t next_branch = UINT32_MAX;
size_t i;
if (found_calls)
*found_calls = false;
for (i = start; i < num_instructions; i++) {
for (size_t i = start; i < num_instructions; i++) {
if (m_instructions[i]->DoesBranch()) {
if (ignore_calls && m_instructions[i]->IsCall()) {
if (found_calls)
@ -1012,42 +1010,6 @@ InstructionList::GetIndexOfNextBranchInstruction(uint32_t start,
}
}
// Hexagon needs the first instruction of the packet with the branch. Go
// backwards until we find an instruction marked end-of-packet, or until we
// hit start.
if (target.GetArchitecture().GetTriple().getArch() == llvm::Triple::hexagon) {
// If we didn't find a branch, find the last packet start.
if (next_branch == UINT32_MAX) {
i = num_instructions - 1;
}
while (i > start) {
--i;
Status error;
uint32_t inst_bytes;
bool prefer_file_cache = false; // Read from process if process is running
lldb::addr_t load_addr = LLDB_INVALID_ADDRESS;
target.ReadMemory(m_instructions[i]->GetAddress(), prefer_file_cache,
&inst_bytes, sizeof(inst_bytes), error, &load_addr);
// If we have an error reading memory, return start
if (!error.Success())
return start;
// check if this is the last instruction in a packet bits 15:14 will be
// 11b or 00b for a duplex
if (((inst_bytes & 0xC000) == 0xC000) ||
((inst_bytes & 0xC000) == 0x0000)) {
// instruction after this should be the start of next packet
next_branch = i + 1;
break;
}
}
if (next_branch == UINT32_MAX) {
// We couldn't find the previous packet, so return start
next_branch = start;
}
}
return next_branch;
}

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@ -5947,10 +5947,8 @@ Process::AdvanceAddressToNextBranchInstruction(Address default_stop_addr,
return retval;
}
uint32_t branch_index =
insn_list->GetIndexOfNextBranchInstruction(insn_offset, target,
false /* ignore_calls*/,
nullptr);
uint32_t branch_index = insn_list->GetIndexOfNextBranchInstruction(
insn_offset, false /* ignore_calls*/, nullptr);
if (branch_index == UINT32_MAX) {
return retval;
}

View File

@ -327,13 +327,9 @@ bool ThreadPlanStepRange::SetNextBranchBreakpoint() {
if (instructions == nullptr)
return false;
else {
Target &target = GetThread().GetProcess()->GetTarget();
const bool ignore_calls = GetKind() == eKindStepOverRange;
uint32_t branch_index =
instructions->GetIndexOfNextBranchInstruction(pc_index, target,
ignore_calls,
&m_found_calls);
uint32_t branch_index = instructions->GetIndexOfNextBranchInstruction(
pc_index, ignore_calls, &m_found_calls);
Address run_to_address;
// If we didn't find a branch, run to the end of the range.