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Fix the assertion error in collectLoopUniforms caused by empty Worklist before expanding. 

Contributed-by: David Callahan

Differential Revision: https://reviews.llvm.org/D22886

llvm-svn: 276943
This commit is contained in:
Wei Mi 2016-07-27 23:53:58 +00:00
parent 45bcdcbefb
commit 315bb33f27
2 changed files with 21 additions and 2 deletions
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4
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
View File

@ -4859,7 +4859,7 @@ void LoopVectorizationLegality::collectLoopUniforms() {
// out of scope. It ensures a uniform instruction will only be used
// by uniform instructions or out of scope instructions.
unsigned idx = 0;
do {
while (idx != Worklist.size()) {
Instruction *I = Worklist[idx++];
for (auto OV : I->operand_values()) {
@ -4873,7 +4873,7 @@ void LoopVectorizationLegality::collectLoopUniforms() {
DEBUG(dbgs() << "LV: Found uniform instruction: " << *OI << "\n");
}
}
} while (idx != Worklist.size());
}
// For an instruction to be added into Worklist above, all its users inside
// the current loop should be already added into Worklist. This condition

19
llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll Normal file
View File

@ -0,0 +1,19 @@
; RUN: opt < %s -loop-vectorize -S
define void @foo() local_unnamed_addr {
entry:
%exitcond = icmp eq i64 3, 3
br label %for.body
for.body: ; preds = %entry
%i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
%total1 = add nsw i64 %i.05, 3
%inc = add nuw nsw i64 %i.05, 1
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
for.end: ; preds = %for.body
ret void
}
!0 = distinct !{!0, !1}
!1 = !{!"llvm.loop.vectorize.enable", i1 true}