forked from OSchip/llvm-project
[AArch64] Create a separate feature set for Exynos M3
Distinguish the features from Exynos M2. llvm-svn: 323139
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@ -316,7 +316,7 @@ def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1",
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FeatureZCZeroing]>;
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def ProcExynosM2 : SubtargetFeature<"exynosm2", "ARMProcFamily", "ExynosM1",
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"Samsung Exynos-M2/M3 processors",
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"Samsung Exynos-M2 processors",
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[FeatureSlowPaired128,
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FeatureCRC,
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FeatureCrypto,
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@ -329,6 +329,21 @@ def ProcExynosM2 : SubtargetFeature<"exynosm2", "ARMProcFamily", "ExynosM1",
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FeatureSlowMisaligned128Store,
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FeatureZCZeroing]>;
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def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM1",
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"Samsung Exynos-M3 processors",
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[FeatureCRC,
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FeatureCrypto,
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FeatureCustomCheapAsMoveHandling,
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FeatureFPARMv8,
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FeatureFuseAES,
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FeatureFuseLiterals,
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FeatureNEON,
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FeaturePerfMon,
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FeaturePostRAScheduler,
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FeatureSlowMisaligned128Store,
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FeatureSlowPaired128,
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FeatureZCZeroing]>;
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def ProcKryo : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
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"Qualcomm Kryo processors", [
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FeatureCRC,
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@ -449,7 +464,7 @@ def : ProcessorModel<"cortex-a75", CortexA57Model, [ProcA75]>;
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def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
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def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>;
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def : ProcessorModel<"exynos-m2", ExynosM1Model, [ProcExynosM2]>;
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def : ProcessorModel<"exynos-m3", ExynosM1Model, [ProcExynosM2]>;
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def : ProcessorModel<"exynos-m3", ExynosM1Model, [ProcExynosM3]>;
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def : ProcessorModel<"falkor", FalkorModel, [ProcFalkor]>;
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def : ProcessorModel<"saphira", FalkorModel, [ProcSaphira]>;
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def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>;
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