From 3105d0f84bfa6b765bb88cbf090f557e588764ea Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 11 Sep 2020 11:42:44 -0400 Subject: [PATCH] CodeGen: Move split block utility to MachineBasicBlock AMDGPU needs this in several places, so consolidate them here. --- llvm/include/llvm/CodeGen/MachineBasicBlock.h | 12 ++++++ llvm/lib/CodeGen/MachineBasicBlock.cpp | 40 +++++++++++++++++++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 26 ++---------- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 40 +------------------ 4 files changed, 57 insertions(+), 61 deletions(-) diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h index 144457a1bc47..f4e36ab8d645 100644 --- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h +++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h @@ -40,6 +40,7 @@ class Printable; class SlotIndexes; class StringRef; class raw_ostream; +class LiveIntervals; class TargetRegisterClass; class TargetRegisterInfo; @@ -675,6 +676,17 @@ public: return !empty() && back().isEHScopeReturn(); } + /// Split a basic block into 2 pieces at \p SplitPoint. A new block will be + /// inserted after this block, and all instructions after \p SplitInst moved + /// to it (\p SplitInst will be in the original block). If \p LIS is provided, + /// LiveIntervals will be appropriately updated. \return the newly inserted + /// block. + /// + /// If \p UpdateLiveIns is true, this will ensure the live ins list is + /// accurate, including for physreg uses/defs in the original block. + MachineBasicBlock *splitAt(MachineInstr &SplitInst, bool UpdateLiveIns = true, + LiveIntervals *LIS = nullptr); + /// Split the critical edge from this block to the given successor block, and /// return the newly created block, or null if splitting is not possible. /// diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index 42d519970c4d..8a37a1e9d6f2 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -944,6 +944,46 @@ bool MachineBasicBlock::canFallThrough() { return getFallThrough() != nullptr; } +MachineBasicBlock *MachineBasicBlock::splitAt(MachineInstr &MI, + bool UpdateLiveIns, + LiveIntervals *LIS) { + MachineBasicBlock::iterator SplitPoint(&MI); + ++SplitPoint; + + if (SplitPoint == end()) { + // Don't bother with a new block. + return this; + } + + MachineFunction *MF = getParent(); + + LivePhysRegs LiveRegs; + if (UpdateLiveIns) { + // Make sure we add any physregs we define in the block as liveins to the + // new block. + LiveRegs.init(*MF->getSubtarget().getRegisterInfo()); + LiveRegs.addLiveOuts(*this); + for (auto I = rbegin(), E = SplitPoint.getReverse(); I != E; ++I) + LiveRegs.stepBackward(*I); + } + + MachineBasicBlock *SplitBB = MF->CreateMachineBasicBlock(getBasicBlock()); + + MF->insert(++MachineFunction::iterator(this), SplitBB); + SplitBB->splice(SplitBB->begin(), this, SplitPoint, end()); + + SplitBB->transferSuccessorsAndUpdatePHIs(this); + addSuccessor(SplitBB); + + if (UpdateLiveIns) + addLiveIns(*SplitBB, LiveRegs); + + if (LIS) + LIS->insertMBBInMaps(SplitBB, &MI); + + return SplitBB; +} + MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge( MachineBasicBlock *Succ, Pass &P, std::vector> *LiveInSets) { diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 577c27efc079..a91a652b8c14 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -3334,29 +3334,11 @@ Register SITargetLowering::getRegisterByName(const char* RegName, LLT VT, // If kill is not the last instruction, split the block so kill is always a // proper terminator. -MachineBasicBlock *SITargetLowering::splitKillBlock(MachineInstr &MI, - MachineBasicBlock *BB) const { +MachineBasicBlock * +SITargetLowering::splitKillBlock(MachineInstr &MI, + MachineBasicBlock *BB) const { + MachineBasicBlock *SplitBB = BB->splitAt(MI, false /*UpdateLiveIns*/); const SIInstrInfo *TII = getSubtarget()->getInstrInfo(); - - MachineBasicBlock::iterator SplitPoint(&MI); - ++SplitPoint; - - if (SplitPoint == BB->end()) { - // Don't bother with a new block. - MI.setDesc(TII->getKillTerminatorFromPseudo(MI.getOpcode())); - return BB; - } - - MachineFunction *MF = BB->getParent(); - MachineBasicBlock *SplitBB - = MF->CreateMachineBasicBlock(BB->getBasicBlock()); - - MF->insert(++MachineFunction::iterator(BB), SplitBB); - SplitBB->splice(SplitBB->begin(), BB, SplitPoint, BB->end()); - - SplitBB->transferSuccessorsAndUpdatePHIs(BB); - BB->addSuccessor(SplitBB); - MI.setDesc(TII->getKillTerminatorFromPseudo(MI.getOpcode())); return SplitBB; } diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp index 2d31c3444937..a29313dae3c6 100644 --- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp +++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp @@ -108,8 +108,6 @@ private: void emitIfBreak(MachineInstr &MI); void emitLoop(MachineInstr &MI); - MachineBasicBlock *splitBlock(MachineInstr &MI, MachineBasicBlock *BB, - LiveIntervals *LIS); MachineBasicBlock *emitEndCf(MachineInstr &MI); void findMaskOperands(MachineInstr &MI, unsigned OpNo, @@ -493,42 +491,6 @@ SILowerControlFlow::skipIgnoreExecInstsTrivialSucc( } while (true); } -MachineBasicBlock *SILowerControlFlow::splitBlock(MachineInstr &MI, - MachineBasicBlock *BB, - LiveIntervals *LIS) { - MachineBasicBlock::iterator SplitPoint(&MI); - ++SplitPoint; - - if (SplitPoint == BB->end()) { - // Don't bother with a new block. - return BB; - } - - // Make sure we add any physregs we define in the block as liveins to the new - // block. - LivePhysRegs LiveRegs(*TRI); - LiveRegs.addLiveOuts(*BB); - for (auto I = BB->rbegin(), E = SplitPoint.getReverse(); I != E; ++I) - LiveRegs.stepBackward(*I); - - MachineFunction *MF = BB->getParent(); - MachineBasicBlock *SplitBB - = MF->CreateMachineBasicBlock(BB->getBasicBlock()); - - MF->insert(++MachineFunction::iterator(BB), SplitBB); - SplitBB->splice(SplitBB->begin(), BB, SplitPoint, BB->end()); - - SplitBB->transferSuccessorsAndUpdatePHIs(BB); - BB->addSuccessor(SplitBB); - - addLiveIns(*SplitBB, LiveRegs); - - if (LIS) - LIS->insertMBBInMaps(SplitBB, &MI); - - return SplitBB; -} - MachineBasicBlock *SILowerControlFlow::emitEndCf(MachineInstr &MI) { MachineBasicBlock &MBB = *MI.getParent(); const DebugLoc &DL = MI.getDebugLoc(); @@ -551,7 +513,7 @@ MachineBasicBlock *SILowerControlFlow::emitEndCf(MachineInstr &MI) { unsigned Opcode = OrOpc; MachineBasicBlock *SplitBB = &MBB; if (NeedBlockSplit) { - SplitBB = splitBlock(MI, &MBB, LIS); + SplitBB = MBB.splitAt(MI, /*UpdateLiveIns*/true, LIS); Opcode = OrTermrOpc; InsPt = MI; }