forked from OSchip/llvm-project
[GlobalISel] NFC: Add some test coverage for s158
158 = 32 * 5 - 2 This is a wide type which may benefit from a different widening scheme than types which are multiples of 64. For example, if 32-bit and 64-bit scalars are both allowed, and a type is a multiple of 32, or is closer to a multiple of 32, it *may* be better to - Widen to the wide multiple of 32 - Break up the type into 32-bit chunks Anyway, we don't have any test coverage for this at all, so for the sake of making sure we test it, let's add some test coverage.
This commit is contained in:
Jessica Paquette
parent
d81b014469
commit
30922d62f4
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@ -114,3 +114,47 @@ body: |
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%and:_(s318) = G_AND %a, %b
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G_STORE %and(s318), %ptr(p0) :: (store (s318))
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RET_ReallyLR implicit $x0
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...
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---
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name: test_s158_and
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: test_s158_and
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: %ptr:_(p0) = COPY $x0
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
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; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
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; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903
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; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C]]
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; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[AND1]], [[C]]
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; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[AND2]], [[C]]
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; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s64) = G_AND [[AND3]], [[C]]
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; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[AND4]], [[C1]]
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; CHECK-NEXT: G_STORE [[AND5]](s64), %ptr(p0) :: (store (s64), align 64)
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
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; CHECK-NEXT: G_STORE [[AND6]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
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; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
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; CHECK-NEXT: G_STORE [[AND7]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16, align 16)
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; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
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; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64)
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; CHECK-NEXT: G_STORE [[AND8]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24)
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; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
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; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64)
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; CHECK-NEXT: G_STORE [[AND9]](s64), [[PTR_ADD3]](p0) :: (store (s64) into unknown-address + 32, align 32)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s318) = G_IMPLICIT_DEF
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%b:_(s318) = G_IMPLICIT_DEF
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%ptr:_(p0) = COPY $x0
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%and:_(s318) = G_AND %a, %b
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G_STORE %and(s318), %ptr(p0) :: (store (s318))
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RET_ReallyLR implicit $x0
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@ -1,5 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
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# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: test_icmp
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body: |
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@ -189,6 +189,7 @@ body: |
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; CHECK-LABEL: name: test_s96_eq
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: {{ $}}
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
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@ -279,3 +280,48 @@ body: |
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successors:
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bb.3:
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RET_ReallyLR
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...
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---
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name: test_s158_eq
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: test_s158_eq
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
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; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
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; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
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; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
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; CHECK: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
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; CHECK: [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
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; CHECK: [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
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; CHECK: [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
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; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND4]]
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; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND5]]
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; CHECK: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND6]]
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; CHECK: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND7]]
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; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
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; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]
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; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]
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; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR2]](s64), [[C2]]
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; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
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; CHECK: G_BRCOND %cmp(s1), %bb.1
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; CHECK: G_BR %bb.2
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; CHECK: bb.1:
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; CHECK: successors:
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; CHECK: bb.2:
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; CHECK: RET_ReallyLR
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bb.1:
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%lhs:_(s158) = G_IMPLICIT_DEF
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%rhs:_(s158) = G_IMPLICIT_DEF
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%cmp:_(s1) = G_ICMP intpred(eq), %lhs(s158), %rhs
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G_BRCOND %cmp(s1), %bb.2
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G_BR %bb.3
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bb.2:
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successors:
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bb.3:
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RET_ReallyLR
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@ -110,3 +110,34 @@ body: |
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G_STORE %cst(s318), %ptr(p0) :: (store (s318))
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RET_ReallyLR implicit $w0
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...
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---
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name: s158
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registers:
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: s158
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK-NEXT: %ptr:_(p0) = COPY $x0
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C1]], [[C2]]
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[C1]], [[C3]]
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
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; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
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; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32)
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; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64)
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; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
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; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64)
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; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 16)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%cst:_(s158) = G_CONSTANT i158 1234
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%ptr:_(p0) = COPY $x0
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G_STORE %cst(s158), %ptr(p0) :: (store (s158))
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RET_ReallyLR implicit $w0
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...
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@ -107,3 +107,36 @@ body: |
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%val:_(s318) = G_IMPLICIT_DEF
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G_STORE %val(s318), %ptr(p0) :: (store (s318), align 8)
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RET_ReallyLR
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...
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---
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name: store_s158
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: store_s158
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %ptr:_(p0) = COPY $x0
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
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; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
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; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64))
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
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; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
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; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
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; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 8)
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; CHECK-NEXT: RET_ReallyLR
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%ptr:_(p0) = COPY $x0
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%val:_(s158) = G_IMPLICIT_DEF
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G_STORE %val(s158), %ptr(p0) :: (store (s158), align 8)
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RET_ReallyLR
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@ -108,3 +108,40 @@ body: |
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%xor:_(s319) = G_XOR %a, %b
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G_STORE %xor(s319), %ptr(p0) :: (store (s319))
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RET_ReallyLR implicit $x0
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...
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---
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name: test_s158_xor
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: test_s158_xor
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; CHECK: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: %ptr:_(p0) = COPY $x0
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; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
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; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
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; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR1]], [[C]]
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[XOR2]], [[C1]]
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
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; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
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; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32)
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
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; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
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; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
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; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 16)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%a:_(s158) = G_IMPLICIT_DEF
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%b:_(s158) = G_IMPLICIT_DEF
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%ptr:_(p0) = COPY $x0
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%xor:_(s158) = G_XOR %a, %b
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G_STORE %xor(s158), %ptr(p0) :: (store (s158))
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RET_ReallyLR implicit $x0
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