forked from OSchip/llvm-project
[AMDGPU] Regenerate MIR checks for image instructions
This commit is contained in:
Jay Foad
parent
069ca6f7a3
commit
3035cc5bdb
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -6,51 +6,53 @@
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define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice, i32 %fragid) {
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; GFX6-LABEL: name: load_2darraymsaa
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; GFX6: bb.1 (%ir-block.0):
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; GFX6: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX6: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX6: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX6: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX6: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX6: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX6: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
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; GFX6: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
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; GFX6: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GFX6: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
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; GFX6: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
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; GFX6: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr3
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; GFX6: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)
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; GFX6: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[BUILD_VECTOR1]](<4 x s32>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
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; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)
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; GFX6: $vgpr0 = COPY [[UV]](s32)
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; GFX6: $vgpr1 = COPY [[UV1]](s32)
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; GFX6: $vgpr2 = COPY [[UV2]](s32)
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; GFX6: $vgpr3 = COPY [[UV3]](s32)
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; GFX6: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
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; GFX6-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX6-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX6-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX6-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX6-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX6-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
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; GFX6-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
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; GFX6-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GFX6-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
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; GFX6-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
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; GFX6-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr3
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; GFX6-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)
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; GFX6-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[BUILD_VECTOR1]](<4 x s32>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
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; GFX6-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)
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; GFX6-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GFX6-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GFX6-NEXT: $vgpr2 = COPY [[UV2]](s32)
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; GFX6-NEXT: $vgpr3 = COPY [[UV3]](s32)
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; GFX6-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
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; GFX10NSA-LABEL: name: load_2darraymsaa
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; GFX10NSA: bb.1 (%ir-block.0):
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; GFX10NSA: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX10NSA: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX10NSA: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX10NSA: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX10NSA: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX10NSA: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX10NSA: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX10NSA: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX10NSA: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
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; GFX10NSA: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
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; GFX10NSA: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GFX10NSA: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
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; GFX10NSA: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
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; GFX10NSA: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr3
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; GFX10NSA: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
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; GFX10NSA: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)
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; GFX10NSA: $vgpr0 = COPY [[UV]](s32)
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; GFX10NSA: $vgpr1 = COPY [[UV1]](s32)
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; GFX10NSA: $vgpr2 = COPY [[UV2]](s32)
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; GFX10NSA: $vgpr3 = COPY [[UV3]](s32)
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; GFX10NSA: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
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; GFX10NSA-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX10NSA-NEXT: {{ $}}
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; GFX10NSA-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX10NSA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX10NSA-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX10NSA-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX10NSA-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX10NSA-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX10NSA-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX10NSA-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
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; GFX10NSA-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
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; GFX10NSA-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GFX10NSA-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
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; GFX10NSA-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
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; GFX10NSA-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr3
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; GFX10NSA-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
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; GFX10NSA-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)
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; GFX10NSA-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GFX10NSA-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GFX10NSA-NEXT: $vgpr2 = COPY [[UV2]](s32)
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; GFX10NSA-NEXT: $vgpr3 = COPY [[UV3]](s32)
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; GFX10NSA-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
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%v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
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ret <4 x float> %v
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}
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@ -58,59 +60,61 @@ define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, i32 %s, i3
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define amdgpu_ps <4 x float> @load_2darraymsaa_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i32 %s, i32 %t, i32 %slice, i32 %fragid) {
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; GFX6-LABEL: name: load_2darraymsaa_tfe
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; GFX6: bb.1 (%ir-block.0):
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; GFX6: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX6: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX6: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX6: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX6: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX6: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX6: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
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; GFX6: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
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; GFX6: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10
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; GFX6: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11
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; GFX6: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
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; GFX6: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GFX6: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr1
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; GFX6: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr2
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; GFX6: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr3
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; GFX6: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32)
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; GFX6: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<5 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[BUILD_VECTOR1]](<4 x s32>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
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; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<5 x s32>)
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; GFX6: G_STORE [[UV4]](s32), [[MV]](p1) :: (store (s32) into %ir.out, addrspace 1)
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; GFX6: $vgpr0 = COPY [[UV]](s32)
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; GFX6: $vgpr1 = COPY [[UV1]](s32)
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; GFX6: $vgpr2 = COPY [[UV2]](s32)
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; GFX6: $vgpr3 = COPY [[UV3]](s32)
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; GFX6: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
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; GFX6-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX6-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX6-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX6-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX6-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX6-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
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; GFX6-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
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; GFX6-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10
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; GFX6-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11
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; GFX6-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
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; GFX6-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GFX6-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr1
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; GFX6-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr2
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; GFX6-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr3
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; GFX6-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32)
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; GFX6-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<5 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[BUILD_VECTOR1]](<4 x s32>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
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; GFX6-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<5 x s32>)
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; GFX6-NEXT: G_STORE [[UV4]](s32), [[MV]](p1) :: (store (s32) into %ir.out, addrspace 1)
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; GFX6-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GFX6-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GFX6-NEXT: $vgpr2 = COPY [[UV2]](s32)
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; GFX6-NEXT: $vgpr3 = COPY [[UV3]](s32)
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; GFX6-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
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; GFX10NSA-LABEL: name: load_2darraymsaa_tfe
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; GFX10NSA: bb.1 (%ir-block.0):
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; GFX10NSA: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX10NSA: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
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; GFX10NSA: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
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; GFX10NSA: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
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; GFX10NSA: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
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; GFX10NSA: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
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; GFX10NSA: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
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; GFX10NSA: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
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; GFX10NSA: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX10NSA: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX10NSA: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10
|
||||
; GFX10NSA: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11
|
||||
; GFX10NSA: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
|
||||
; GFX10NSA: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX10NSA: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX10NSA: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX10NSA: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr3
|
||||
; GFX10NSA: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<5 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
|
||||
; GFX10NSA: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<5 x s32>)
|
||||
; GFX10NSA: G_STORE [[UV4]](s32), [[MV]](p1) :: (store (s32) into %ir.out, addrspace 1)
|
||||
; GFX10NSA: $vgpr0 = COPY [[UV]](s32)
|
||||
; GFX10NSA: $vgpr1 = COPY [[UV1]](s32)
|
||||
; GFX10NSA: $vgpr2 = COPY [[UV2]](s32)
|
||||
; GFX10NSA: $vgpr3 = COPY [[UV3]](s32)
|
||||
; GFX10NSA: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
|
||||
; GFX10NSA-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $vgpr0, $vgpr1, $vgpr2, $vgpr3
|
||||
; GFX10NSA-NEXT: {{ $}}
|
||||
; GFX10NSA-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX10NSA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX10NSA-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX10NSA-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX10NSA-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX10NSA-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX10NSA-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX10NSA-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX10NSA-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX10NSA-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10
|
||||
; GFX10NSA-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11
|
||||
; GFX10NSA-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)
|
||||
; GFX10NSA-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX10NSA-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX10NSA-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX10NSA-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr3
|
||||
; GFX10NSA-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<5 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.2darraymsaa), 15, [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32), [[COPY13]](s32), [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (<4 x s32>) from custom "ImageResource")
|
||||
; GFX10NSA-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<5 x s32>)
|
||||
; GFX10NSA-NEXT: G_STORE [[UV4]](s32), [[MV]](p1) :: (store (s32) into %ir.out, addrspace 1)
|
||||
; GFX10NSA-NEXT: $vgpr0 = COPY [[UV]](s32)
|
||||
; GFX10NSA-NEXT: $vgpr1 = COPY [[UV1]](s32)
|
||||
; GFX10NSA-NEXT: $vgpr2 = COPY [[UV2]](s32)
|
||||
; GFX10NSA-NEXT: $vgpr3 = COPY [[UV3]](s32)
|
||||
; GFX10NSA-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
|
||||
%v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.2darraymsaa.sl_v4f32i32s.i32(i32 15, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 1, i32 0)
|
||||
%v.vec = extractvalue { <4 x float>, i32 } %v, 0
|
||||
%v.err = extractvalue { <4 x float>, i32 } %v, 1
|
||||
|
|
|
|||
|
|
@ -6,41 +6,43 @@
|
|||
define amdgpu_ps float @image_load_3d_f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {
|
||||
; GFX6-LABEL: name: image_load_3d_f32
|
||||
; GFX6: bb.1 (%ir-block.0):
|
||||
; GFX6: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX6: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX6: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX6: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX6: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX6: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX6: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX6: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX6: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX6: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX6: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX6: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32)
|
||||
; GFX6: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[BUILD_VECTOR1]](<3 x s32>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX6: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)
|
||||
; GFX6: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX6-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX6-NEXT: {{ $}}
|
||||
; GFX6-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX6-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX6-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX6-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX6-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX6-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX6-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX6-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX6-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX6-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX6-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX6-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX6-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32)
|
||||
; GFX6-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[BUILD_VECTOR1]](<3 x s32>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX6-NEXT: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)
|
||||
; GFX6-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX10NSA-LABEL: name: image_load_3d_f32
|
||||
; GFX10NSA: bb.1 (%ir-block.0):
|
||||
; GFX10NSA: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX10NSA: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX10NSA: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX10NSA: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX10NSA: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX10NSA: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX10NSA: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX10NSA: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX10NSA: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX10NSA: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX10NSA: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX10NSA: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX10NSA: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX10NSA: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX10NSA: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)
|
||||
; GFX10NSA: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX10NSA-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX10NSA-NEXT: {{ $}}
|
||||
; GFX10NSA-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX10NSA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX10NSA-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX10NSA-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX10NSA-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX10NSA-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX10NSA-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX10NSA-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX10NSA-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX10NSA-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX10NSA-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX10NSA-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX10NSA-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[BUILD_VECTOR]](<8 x s32>), 0, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX10NSA-NEXT: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)
|
||||
; GFX10NSA-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
%tex = call float @llvm.amdgcn.image.load.3d.f32.i32(i32 1, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 0, i32 0)
|
||||
ret float %tex
|
||||
}
|
||||
|
|
@ -48,47 +50,49 @@ define amdgpu_ps float @image_load_3d_f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t,
|
|||
define amdgpu_ps float @image_load_3d_tfe_f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r) {
|
||||
; GFX6-LABEL: name: image_load_3d_tfe_f32
|
||||
; GFX6: bb.1 (%ir-block.0):
|
||||
; GFX6: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX6: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX6: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX6: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX6: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX6: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX6: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX6: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX6: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX6: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX6: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX6: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
|
||||
; GFX6: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32)
|
||||
; GFX6: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[BUILD_VECTOR1]](<3 x s32>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)
|
||||
; GFX6: G_STORE [[UV1]](s32), [[DEF]](p1) :: (store (s32) into `i32 addrspace(1)* undef`, addrspace 1)
|
||||
; GFX6: $vgpr0 = COPY [[UV]](s32)
|
||||
; GFX6: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX6-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX6-NEXT: {{ $}}
|
||||
; GFX6-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX6-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX6-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX6-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX6-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX6-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX6-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX6-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX6-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX6-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX6-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX6-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX6-NEXT: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
|
||||
; GFX6-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32)
|
||||
; GFX6-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[BUILD_VECTOR1]](<3 x s32>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX6-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)
|
||||
; GFX6-NEXT: G_STORE [[UV1]](s32), [[DEF]](p1) :: (store (s32) into `i32 addrspace(1)* undef`, addrspace 1)
|
||||
; GFX6-NEXT: $vgpr0 = COPY [[UV]](s32)
|
||||
; GFX6-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX10NSA-LABEL: name: image_load_3d_tfe_f32
|
||||
; GFX10NSA: bb.1 (%ir-block.0):
|
||||
; GFX10NSA: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX10NSA: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX10NSA: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX10NSA: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX10NSA: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX10NSA: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX10NSA: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX10NSA: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX10NSA: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX10NSA: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX10NSA: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX10NSA: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX10NSA: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX10NSA: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
|
||||
; GFX10NSA: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX10NSA: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)
|
||||
; GFX10NSA: G_STORE [[UV1]](s32), [[DEF]](p1) :: (store (s32) into `i32 addrspace(1)* undef`, addrspace 1)
|
||||
; GFX10NSA: $vgpr0 = COPY [[UV]](s32)
|
||||
; GFX10NSA: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX10NSA-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2
|
||||
; GFX10NSA-NEXT: {{ $}}
|
||||
; GFX10NSA-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2
|
||||
; GFX10NSA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3
|
||||
; GFX10NSA-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4
|
||||
; GFX10NSA-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5
|
||||
; GFX10NSA-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6
|
||||
; GFX10NSA-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7
|
||||
; GFX10NSA-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8
|
||||
; GFX10NSA-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9
|
||||
; GFX10NSA-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; GFX10NSA-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; GFX10NSA-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; GFX10NSA-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr2
|
||||
; GFX10NSA-NEXT: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
|
||||
; GFX10NSA-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.load.3d), 1, [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[BUILD_VECTOR]](<8 x s32>), 1, 0, 0 :: (dereferenceable load (s32) from custom "ImageResource")
|
||||
; GFX10NSA-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)
|
||||
; GFX10NSA-NEXT: G_STORE [[UV1]](s32), [[DEF]](p1) :: (store (s32) into `i32 addrspace(1)* undef`, addrspace 1)
|
||||
; GFX10NSA-NEXT: $vgpr0 = COPY [[UV]](s32)
|
||||
; GFX10NSA-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
%val = call { float, i32 } @llvm.amdgcn.image.load.3d.sl_f32i32s.i32(i32 1, i32 %s, i32 %t, i32 %r, <8 x i32> %rsrc, i32 1, i32 0)
|
||||
%tex = extractvalue { float, i32 } %val, 0
|
||||
%tfe = extractvalue { float, i32 } %val, 1
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -15,31 +15,34 @@ body: |
|
|||
|
||||
; GFX6-LABEL: name: atomic_cmpswap_i32_1d
|
||||
; GFX6: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1, $vgpr2
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX6: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_si:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_si [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX6: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V1_V1_si]].sub0
|
||||
; GFX6: $vgpr0 = COPY [[COPY3]]
|
||||
; GFX6: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX6-NEXT: {{ $}}
|
||||
; GFX6-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX6-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_si:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_si [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX6-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V1_V1_si]].sub0
|
||||
; GFX6-NEXT: $vgpr0 = COPY [[COPY3]]
|
||||
; GFX6-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX8-LABEL: name: atomic_cmpswap_i32_1d
|
||||
; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1, $vgpr2
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX8: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_vi:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V1_V1_vi]].sub0
|
||||
; GFX8: $vgpr0 = COPY [[COPY3]]
|
||||
; GFX8: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX8-NEXT: {{ $}}
|
||||
; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX8-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_vi:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX8-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V1_V1_vi]].sub0
|
||||
; GFX8-NEXT: $vgpr0 = COPY [[COPY3]]
|
||||
; GFX8-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX10-LABEL: name: atomic_cmpswap_i32_1d
|
||||
; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1, $vgpr2
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX10: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10_:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 3, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10_]].sub0
|
||||
; GFX10: $vgpr0 = COPY [[COPY3]]
|
||||
; GFX10: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX10-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10_:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 3, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX10-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10_]].sub0
|
||||
; GFX10-NEXT: $vgpr0 = COPY [[COPY3]]
|
||||
; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||||
%0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
%1:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
|
||||
%2:vgpr(s32) = COPY $vgpr2
|
||||
|
|
@ -60,25 +63,28 @@ body: |
|
|||
|
||||
; GFX6-LABEL: name: atomic_cmpswap_i32_1d_no_return
|
||||
; GFX6: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1, $vgpr2
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX6: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_si:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_si [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX6: S_ENDPGM 0
|
||||
; GFX6-NEXT: {{ $}}
|
||||
; GFX6-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX6-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_si:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_si [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX6-NEXT: S_ENDPGM 0
|
||||
; GFX8-LABEL: name: atomic_cmpswap_i32_1d_no_return
|
||||
; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1, $vgpr2
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX8: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_vi:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX8: S_ENDPGM 0
|
||||
; GFX8-NEXT: {{ $}}
|
||||
; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX8-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_vi:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 3, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX8-NEXT: S_ENDPGM 0
|
||||
; GFX10-LABEL: name: atomic_cmpswap_i32_1d_no_return
|
||||
; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1, $vgpr2
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX10: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10_:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 3, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX10: S_ENDPGM 0
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; GFX10-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10_:%[0-9]+]]:vreg_64 = IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 3, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on custom "ImageResource")
|
||||
; GFX10-NEXT: S_ENDPGM 0
|
||||
%0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
%1:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
|
||||
%2:vgpr(s32) = COPY $vgpr2
|
||||
|
|
@ -98,31 +104,34 @@ body: |
|
|||
|
||||
; GFX6-LABEL: name: atomic_cmpswap_i64_1d
|
||||
; GFX6: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX6: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_si:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_si [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX6: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V2_V1_si]].sub0_sub1
|
||||
; GFX6: $vgpr0_vgpr1 = COPY [[COPY3]]
|
||||
; GFX6: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1
|
||||
; GFX6-NEXT: {{ $}}
|
||||
; GFX6-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX6-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_si:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_si [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX6-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V2_V1_si]].sub0_sub1
|
||||
; GFX6-NEXT: $vgpr0_vgpr1 = COPY [[COPY3]]
|
||||
; GFX6-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1
|
||||
; GFX8-LABEL: name: atomic_cmpswap_i64_1d
|
||||
; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX8: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_vi:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX8: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V2_V1_vi]].sub0_sub1
|
||||
; GFX8: $vgpr0_vgpr1 = COPY [[COPY3]]
|
||||
; GFX8: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1
|
||||
; GFX8-NEXT: {{ $}}
|
||||
; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX8-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_vi:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX8-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V2_V1_vi]].sub0_sub1
|
||||
; GFX8-NEXT: $vgpr0_vgpr1 = COPY [[COPY3]]
|
||||
; GFX8-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1
|
||||
; GFX10-LABEL: name: atomic_cmpswap_i64_1d
|
||||
; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX10: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10_:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 15, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX10: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10_]].sub0_sub1
|
||||
; GFX10: $vgpr0_vgpr1 = COPY [[COPY3]]
|
||||
; GFX10: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX10-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10_:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 15, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX10-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY killed [[IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10_]].sub0_sub1
|
||||
; GFX10-NEXT: $vgpr0_vgpr1 = COPY [[COPY3]]
|
||||
; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0_vgpr1
|
||||
%0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
%1:vgpr(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%2:vgpr(s32) = COPY $vgpr4
|
||||
|
|
@ -143,25 +152,28 @@ body: |
|
|||
|
||||
; GFX6-LABEL: name: atomic_cmpswap_i64_1d_no_return
|
||||
; GFX6: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX6: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_si:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_si [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX6: S_ENDPGM 0
|
||||
; GFX6-NEXT: {{ $}}
|
||||
; GFX6-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX6-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX6-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_si:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_si [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX6-NEXT: S_ENDPGM 0
|
||||
; GFX8-LABEL: name: atomic_cmpswap_i64_1d_no_return
|
||||
; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
||||
; GFX8: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX8: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_vi:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX8: S_ENDPGM 0
|
||||
; GFX8-NEXT: {{ $}}
|
||||
; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX8-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_vi:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_vi [[COPY1]], [[COPY2]], [[COPY]], 15, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX8-NEXT: S_ENDPGM 0
|
||||
; GFX10-LABEL: name: atomic_cmpswap_i64_1d_no_return
|
||||
; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4
|
||||
; GFX10: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX10: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10_:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 15, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX10: S_ENDPGM 0
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr4
|
||||
; GFX10-NEXT: [[IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10_:%[0-9]+]]:vreg_128 = IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10 [[COPY1]], [[COPY2]], [[COPY]], 15, 0, 1, 1, 0, 0, 0, 0, implicit $exec :: (volatile dereferenceable load store (s64) on custom "ImageResource")
|
||||
; GFX10-NEXT: S_ENDPGM 0
|
||||
%0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
|
||||
%1:vgpr(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%2:vgpr(s32) = COPY $vgpr4
|
||||
|
|
|
|||
Loading…
Reference in New Issue