forked from OSchip/llvm-project
DAG: Handle expanding strict_fsub into fneg and strict_fadd
The AMDGPU handling of f16 vectors is terrible still since it gets scalarized even when the vector operation is legal. The code is is essentially duplicated between the non-strict and strict case. Apparently no other expansions are currently trying to do this. This is mostly because I found the behavior of getStrictFPOperationAction to be confusing. In the ARM case, it would expand strict_fsub even though it shouldn't due to the later check. At that point, the logic required to check for legality was more complex than just duplicating the 2 instruction expansion.
This commit is contained in:
Matt Arsenault
Matt Arsenault
parent
303a7f7a26
commit
2fe0ea8261
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@ -3903,6 +3903,23 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
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== TargetLowering::Legal)
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return true;
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break;
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case ISD::STRICT_FSUB: {
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if (TLI.getStrictFPOperationAction(Node->getOpcode(),
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Node->getValueType(0))
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== TargetLowering::Legal)
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return true;
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EVT VT = Node->getValueType(0);
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const SDNodeFlags Flags = Node->getFlags();
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SDValue Neg = DAG.getNode(ISD::FNEG, dl, VT, Node->getOperand(2), Flags);
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SDValue Fadd = DAG.getNode(ISD::STRICT_FADD, dl, Node->getVTList(),
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{Node->getOperand(0), Node->getOperand(1), Neg},
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Flags);
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Results.push_back(Fadd);
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Results.push_back(Fadd.getValue(1));
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break;
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}
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case ISD::STRICT_LRINT:
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case ISD::STRICT_LLRINT:
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case ISD::STRICT_LROUND:
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@ -472,7 +472,7 @@ def V_MADMK_F32 : VOP2_Pseudo <"v_madmk_f32", VOP_MADMK_F32, []>;
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let isCommutable = 1 in {
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defm V_ADD_F32 : VOP2Inst <"v_add_f32", VOP_F32_F32_F32, any_fadd>;
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defm V_SUB_F32 : VOP2Inst <"v_sub_f32", VOP_F32_F32_F32, fsub>;
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defm V_SUB_F32 : VOP2Inst <"v_sub_f32", VOP_F32_F32_F32, any_fsub>;
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defm V_SUBREV_F32 : VOP2Inst <"v_subrev_f32", VOP_F32_F32_F32, null_frag, "v_sub_f32">;
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defm V_MUL_LEGACY_F32 : VOP2Inst <"v_mul_legacy_f32", VOP_F32_F32_F32, AMDGPUfmul_legacy>;
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defm V_MUL_F32 : VOP2Inst <"v_mul_f32", VOP_F32_F32_F32, any_fmul>;
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@ -636,7 +636,7 @@ defm V_ASHRREV_I16 : VOP2Inst <"v_ashrrev_i16", VOP_I16_I16_I16, ashr_rev>;
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let isCommutable = 1 in {
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let FPDPRounding = 1 in {
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defm V_ADD_F16 : VOP2Inst <"v_add_f16", VOP_F16_F16_F16, any_fadd>;
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defm V_SUB_F16 : VOP2Inst <"v_sub_f16", VOP_F16_F16_F16, fsub>;
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defm V_SUB_F16 : VOP2Inst <"v_sub_f16", VOP_F16_F16_F16, any_fsub>;
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defm V_SUBREV_F16 : VOP2Inst <"v_subrev_f16", VOP_F16_F16_F16, null_frag, "v_sub_f16">;
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defm V_MUL_F16 : VOP2Inst <"v_mul_f16", VOP_F16_F16_F16, any_fmul>;
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@ -0,0 +1,196 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9 %s
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,GFX8 %s
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; FIXME: promotion not handled without f16 insts
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define half @v_constained_fsub_f16_fpexcept_strict(half %x, half %y) #0 {
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; GCN-LABEL: v_constained_fsub_f16_fpexcept_strict:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sub_f16_e32 v0, v0, v1
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%val = call half @llvm.experimental.constrained.fsub.f16(half %x, half %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret half %val
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}
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define half @v_constained_fsub_f16_fpexcept_ignore(half %x, half %y) #0 {
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; GCN-LABEL: v_constained_fsub_f16_fpexcept_ignore:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sub_f16_e32 v0, v0, v1
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%val = call half @llvm.experimental.constrained.fsub.f16(half %x, half %y, metadata !"round.tonearest", metadata !"fpexcept.ignore")
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ret half %val
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}
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define half @v_constained_fsub_f16_fpexcept_maytrap(half %x, half %y) #0 {
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; GCN-LABEL: v_constained_fsub_f16_fpexcept_maytrap:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sub_f16_e32 v0, v0, v1
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%val = call half @llvm.experimental.constrained.fsub.f16(half %x, half %y, metadata !"round.tonearest", metadata !"fpexcept.maytrap")
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ret half %val
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}
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define <2 x half> @v_constained_fsub_v2f16_fpexcept_strict(<2 x half> %x, <2 x half> %y) #0 {
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; GFX9-LABEL: v_constained_fsub_v2f16_fpexcept_strict:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_f16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9-NEXT: v_sub_f16_e32 v0, v0, v1
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_constained_fsub_v2f16_fpexcept_strict:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_sub_f16_e32 v0, v0, v1
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; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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%val = call <2 x half> @llvm.experimental.constrained.fsub.v2f16(<2 x half> %x, <2 x half> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret <2 x half> %val
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}
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define <2 x half> @v_constained_fsub_v2f16_fpexcept_ignore(<2 x half> %x, <2 x half> %y) #0 {
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; GFX9-LABEL: v_constained_fsub_v2f16_fpexcept_ignore:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_f16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9-NEXT: v_sub_f16_e32 v0, v0, v1
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_constained_fsub_v2f16_fpexcept_ignore:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_sub_f16_e32 v0, v0, v1
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; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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%val = call <2 x half> @llvm.experimental.constrained.fsub.v2f16(<2 x half> %x, <2 x half> %y, metadata !"round.tonearest", metadata !"fpexcept.ignore")
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ret <2 x half> %val
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}
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define <2 x half> @v_constained_fsub_v2f16_fpexcept_maytrap(<2 x half> %x, <2 x half> %y) #0 {
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; GFX9-LABEL: v_constained_fsub_v2f16_fpexcept_maytrap:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_f16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9-NEXT: v_sub_f16_e32 v0, v0, v1
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_constained_fsub_v2f16_fpexcept_maytrap:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_sub_f16_e32 v0, v0, v1
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; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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%val = call <2 x half> @llvm.experimental.constrained.fsub.v2f16(<2 x half> %x, <2 x half> %y, metadata !"round.tonearest", metadata !"fpexcept.maytrap")
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ret <2 x half> %val
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}
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define <3 x half> @v_constained_fsub_v3f16_fpexcept_strict(<3 x half> %x, <3 x half> %y) #0 {
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; GFX9-LABEL: v_constained_fsub_v3f16_fpexcept_strict:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_f16_sdwa v4, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9-NEXT: v_sub_f16_e32 v0, v0, v2
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v0
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; GFX9-NEXT: v_sub_f16_e32 v1, v1, v3
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_constained_fsub_v3f16_fpexcept_strict:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_sub_f16_e32 v0, v0, v2
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; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: v_sub_f16_e32 v1, v1, v3
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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%val = call <3 x half> @llvm.experimental.constrained.fsub.v3f16(<3 x half> %x, <3 x half> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret <3 x half> %val
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}
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; FIXME: Scalarized
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define <4 x half> @v_constained_fsub_v4f16_fpexcept_strict(<4 x half> %x, <4 x half> %y) #0 {
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; GFX9-LABEL: v_constained_fsub_v4f16_fpexcept_strict:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_f16_sdwa v4, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9-NEXT: v_sub_f16_sdwa v5, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX9-NEXT: v_sub_f16_e32 v0, v0, v2
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; GFX9-NEXT: v_mov_b32_e32 v2, 0xffff
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; GFX9-NEXT: v_sub_f16_e32 v1, v1, v3
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; GFX9-NEXT: v_and_b32_e32 v0, v2, v0
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; GFX9-NEXT: v_and_b32_e32 v1, v2, v1
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; GFX9-NEXT: v_lshl_or_b32 v0, v5, 16, v0
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; GFX9-NEXT: v_lshl_or_b32 v1, v4, 16, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_constained_fsub_v4f16_fpexcept_strict:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_sub_f16_e32 v1, v1, v3
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; GFX8-NEXT: v_sub_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_sub_f16_e32 v0, v0, v2
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; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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%val = call <4 x half> @llvm.experimental.constrained.fsub.v4f16(<4 x half> %x, <4 x half> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret <4 x half> %val
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}
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define amdgpu_ps half @s_constained_fsub_f16_fpexcept_strict(half inreg %x, half inreg %y) #0 {
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; GCN-LABEL: s_constained_fsub_f16_fpexcept_strict:
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; GCN: ; %bb.0:
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; GCN-NEXT: v_mov_b32_e32 v0, s3
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; GCN-NEXT: v_sub_f16_e32 v0, s2, v0
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; GCN-NEXT: ; return to shader part epilog
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%val = call half @llvm.experimental.constrained.fsub.f16(half %x, half %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret half %val
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}
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define amdgpu_ps <2 x half> @s_constained_fsub_v2f16_fpexcept_strict(<2 x half> inreg %x, <2 x half> inreg %y) #0 {
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; GFX9-LABEL: s_constained_fsub_v2f16_fpexcept_strict:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: v_mov_b32_e32 v1, s3
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; GFX9-NEXT: s_lshr_b32 s0, s3, 16
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; GFX9-NEXT: v_sub_f16_e32 v1, s2, v1
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; GFX9-NEXT: s_lshr_b32 s1, s2, 16
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; GFX9-NEXT: v_mov_b32_e32 v0, s0
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; GFX9-NEXT: v_sub_f16_e32 v0, s1, v0
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; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
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; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1
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; GFX9-NEXT: ; return to shader part epilog
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;
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; GFX8-LABEL: s_constained_fsub_v2f16_fpexcept_strict:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_lshr_b32 s0, s3, 16
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; GFX8-NEXT: s_lshr_b32 s1, s2, 16
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; GFX8-NEXT: v_mov_b32_e32 v0, s0
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; GFX8-NEXT: v_mov_b32_e32 v1, s1
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; GFX8-NEXT: v_sub_f16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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; GFX8-NEXT: v_mov_b32_e32 v1, s3
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; GFX8-NEXT: v_sub_f16_e32 v1, s2, v1
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; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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; GFX8-NEXT: ; return to shader part epilog
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%val = call <2 x half> @llvm.experimental.constrained.fsub.v2f16(<2 x half> %x, <2 x half> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
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ret <2 x half> %val
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}
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declare half @llvm.experimental.constrained.fsub.f16(half, half, metadata, metadata) #1
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declare <2 x half> @llvm.experimental.constrained.fsub.v2f16(<2 x half>, <2 x half>, metadata, metadata) #1
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declare <3 x half> @llvm.experimental.constrained.fsub.v3f16(<3 x half>, <3 x half>, metadata, metadata) #1
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declare <4 x half> @llvm.experimental.constrained.fsub.v4f16(<4 x half>, <4 x half>, metadata, metadata) #1
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attributes #0 = { strictfp }
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attributes #1 = { inaccessiblememonly nounwind willreturn }
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@ -0,0 +1,129 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s
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define float @v_constained_fsub_f32_fpexcept_strict(float %x, float %y) #0 {
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; GCN-LABEL: v_constained_fsub_f32_fpexcept_strict:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %x, float %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
define float @v_constained_fsub_f32_fpexcept_ignore(float %x, float %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f32_fpexcept_ignore:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %x, float %y, metadata !"round.tonearest", metadata !"fpexcept.ignore")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
define float @v_constained_fsub_f32_fpexcept_maytrap(float %x, float %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f32_fpexcept_maytrap:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v1
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %x, float %y, metadata !"round.tonearest", metadata !"fpexcept.maytrap")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
define <2 x float> @v_constained_fsub_v2f32_fpexcept_strict(<2 x float> %x, <2 x float> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v2f32_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v2
|
||||
; GCN-NEXT: v_sub_f32_e32 v1, v1, v3
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %x, <2 x float> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret <2 x float> %val
|
||||
}
|
||||
|
||||
define <2 x float> @v_constained_fsub_v2f32_fpexcept_ignore(<2 x float> %x, <2 x float> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v2f32_fpexcept_ignore:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v2
|
||||
; GCN-NEXT: v_sub_f32_e32 v1, v1, v3
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %x, <2 x float> %y, metadata !"round.tonearest", metadata !"fpexcept.ignore")
|
||||
ret <2 x float> %val
|
||||
}
|
||||
|
||||
define <2 x float> @v_constained_fsub_v2f32_fpexcept_maytrap(<2 x float> %x, <2 x float> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v2f32_fpexcept_maytrap:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v2
|
||||
; GCN-NEXT: v_sub_f32_e32 v1, v1, v3
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float> %x, <2 x float> %y, metadata !"round.tonearest", metadata !"fpexcept.maytrap")
|
||||
ret <2 x float> %val
|
||||
}
|
||||
|
||||
define <3 x float> @v_constained_fsub_v3f32_fpexcept_strict(<3 x float> %x, <3 x float> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v3f32_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, v0, v3
|
||||
; GCN-NEXT: v_sub_f32_e32 v1, v1, v4
|
||||
; GCN-NEXT: v_sub_f32_e32 v2, v2, v5
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(<3 x float> %x, <3 x float> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret <3 x float> %val
|
||||
}
|
||||
|
||||
define amdgpu_ps float @s_constained_fsub_f32_fpexcept_strict(float inreg %x, float inreg %y) #0 {
|
||||
; GCN-LABEL: s_constained_fsub_f32_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: v_mov_b32_e32 v0, s3
|
||||
; GCN-NEXT: v_sub_f32_e32 v0, s2, v0
|
||||
; GCN-NEXT: ; return to shader part epilog
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %x, float %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
define float @v_constained_fsub_f32_fpexcept_strict_fabs_lhs(float %x, float %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f32_fpexcept_strict_fabs_lhs:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e64 v0, |v0|, v1
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%fabs.x = call float @llvm.fabs.f32(float %x)
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %fabs.x, float %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
define float @v_constained_fsub_f32_fpexcept_strict_fabs_rhs(float %x, float %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f32_fpexcept_strict_fabs_rhs:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e64 v0, v0, |v1|
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%fabs.y = call float @llvm.fabs.f32(float %y)
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %x, float %fabs.y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
define float @v_constained_fsub_f32_fpexcept_strict_fneg_fabs_lhs(float %x, float %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f32_fpexcept_strict_fneg_fabs_lhs:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_sub_f32_e64 v0, -|v0|, v1
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%fabs.x = call float @llvm.fabs.f32(float %x)
|
||||
%neg.fabs.x = fneg float %fabs.x
|
||||
%val = call float @llvm.experimental.constrained.fsub.f32(float %neg.fabs.x, float %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret float %val
|
||||
}
|
||||
|
||||
declare float @llvm.fabs.f32(float) #1
|
||||
declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata) #1
|
||||
declare <2 x float> @llvm.experimental.constrained.fsub.v2f32(<2 x float>, <2 x float>, metadata, metadata) #1
|
||||
declare <3 x float> @llvm.experimental.constrained.fsub.v3f32(<3 x float>, <3 x float>, metadata, metadata) #1
|
||||
|
||||
attributes #0 = { strictfp }
|
||||
attributes #1 = { inaccessiblememonly nounwind willreturn }
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s
|
||||
|
||||
define double @v_constained_fsub_f64_fpexcept_strict(double %x, double %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f64_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[2:3]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call double @llvm.experimental.constrained.fsub.f64(double %x, double %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret double %val
|
||||
}
|
||||
|
||||
define double @v_constained_fsub_f64_fpexcept_ignore(double %x, double %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f64_fpexcept_ignore:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[2:3]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call double @llvm.experimental.constrained.fsub.f64(double %x, double %y, metadata !"round.tonearest", metadata !"fpexcept.ignore")
|
||||
ret double %val
|
||||
}
|
||||
|
||||
define double @v_constained_fsub_f64_fpexcept_maytrap(double %x, double %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_f64_fpexcept_maytrap:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[2:3]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call double @llvm.experimental.constrained.fsub.f64(double %x, double %y, metadata !"round.tonearest", metadata !"fpexcept.maytrap")
|
||||
ret double %val
|
||||
}
|
||||
|
||||
define <2 x double> @v_constained_fsub_v2f64_fpexcept_strict(<2 x double> %x, <2 x double> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v2f64_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[4:5]
|
||||
; GCN-NEXT: v_add_f64 v[2:3], v[2:3], -v[6:7]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %x, <2 x double> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret <2 x double> %val
|
||||
}
|
||||
|
||||
define <2 x double> @v_constained_fsub_v2f64_fpexcept_ignore(<2 x double> %x, <2 x double> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v2f64_fpexcept_ignore:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[4:5]
|
||||
; GCN-NEXT: v_add_f64 v[2:3], v[2:3], -v[6:7]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %x, <2 x double> %y, metadata !"round.tonearest", metadata !"fpexcept.ignore")
|
||||
ret <2 x double> %val
|
||||
}
|
||||
|
||||
define <2 x double> @v_constained_fsub_v2f64_fpexcept_maytrap(<2 x double> %x, <2 x double> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v2f64_fpexcept_maytrap:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[4:5]
|
||||
; GCN-NEXT: v_add_f64 v[2:3], v[2:3], -v[6:7]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double> %x, <2 x double> %y, metadata !"round.tonearest", metadata !"fpexcept.maytrap")
|
||||
ret <2 x double> %val
|
||||
}
|
||||
|
||||
define <3 x double> @v_constained_fsub_v3f64_fpexcept_strict(<3 x double> %x, <3 x double> %y) #0 {
|
||||
; GCN-LABEL: v_constained_fsub_v3f64_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GCN-NEXT: v_add_f64 v[0:1], v[0:1], -v[6:7]
|
||||
; GCN-NEXT: v_add_f64 v[2:3], v[2:3], -v[8:9]
|
||||
; GCN-NEXT: v_add_f64 v[4:5], v[4:5], -v[10:11]
|
||||
; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
%val = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(<3 x double> %x, <3 x double> %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
ret <3 x double> %val
|
||||
}
|
||||
|
||||
define amdgpu_ps <2 x float> @s_constained_fsub_f64_fpexcept_strict(double inreg %x, double inreg %y) #0 {
|
||||
; GCN-LABEL: s_constained_fsub_f64_fpexcept_strict:
|
||||
; GCN: ; %bb.0:
|
||||
; GCN-NEXT: v_mov_b32_e32 v0, s4
|
||||
; GCN-NEXT: v_mov_b32_e32 v1, s5
|
||||
; GCN-NEXT: v_add_f64 v[0:1], s[2:3], -v[0:1]
|
||||
; GCN-NEXT: ; return to shader part epilog
|
||||
%val = call double @llvm.experimental.constrained.fsub.f64(double %x, double %y, metadata !"round.tonearest", metadata !"fpexcept.strict")
|
||||
%cast = bitcast double %val to <2 x float>
|
||||
ret <2 x float> %cast
|
||||
}
|
||||
|
||||
declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata) #1
|
||||
declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata) #1
|
||||
declare <3 x double> @llvm.experimental.constrained.fsub.v3f64(<3 x double>, <3 x double>, metadata, metadata) #1
|
||||
|
||||
attributes #0 = { strictfp }
|
||||
attributes #1 = { inaccessiblememonly nounwind willreturn }
|
||||
Loading…
Reference in New Issue