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[AArch64] Update test case. 

Replace the new generated virtual register number with a macro to avoid
name mismatch due to different configuration of compiler.
This commit is contained in:
Guozhi Wei 2022-06-29 01:37:56 +00:00
parent 072288dacd
commit 2fcc495549
1 changed files with 6 additions and 6 deletions
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12
llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir
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@ -8,8 +8,8 @@
# 32 bit.
# CHECK-LABEL: name: test1
# CHECK: %10:gpr32common = SUBWrr killed %3, %4
# CHECK-NEXT: %7:gpr32 = SUBWrr killed %10, %5
# CHECK: [[TMP:%[0-9]+]]:gpr32common = SUBWrr killed %3, %4
# CHECK-NEXT: %7:gpr32 = SUBWrr killed [[TMP]], %5
name: test1
registers:
@ -41,8 +41,8 @@ body: |
# 64 bit.
# CHECK-LABEL: name: test2
# CHECK: %10:gpr64common = SUBXrr killed %3, %4
# CHECK-NEXT: %7:gpr64 = SUBXrr killed %10, %5
# CHECK: [[TMP:%[0-9]+]]:gpr64common = SUBXrr killed %3, %4
# CHECK-NEXT: %7:gpr64 = SUBXrr killed [[TMP]], %5
name: test2
registers:
@ -107,8 +107,8 @@ body: |
# Dead define of flag registers should not block transformation.
# CHECK-LABEL: name: test4
# CHECK: %10:gpr64common = SUBXrr killed %3, %4
# CHECK-NEXT: %7:gpr64 = SUBXrr killed %10, %5
# CHECK: [[TMP:%[0-9]+]]:gpr64common = SUBXrr killed %3, %4
# CHECK-NEXT: %7:gpr64 = SUBXrr killed [[TMP]], %5
name: test4
registers: