From 2f9743d2eaafdf7a4e56bd833e029a54354168e9 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@intel.com>
Date: Thu, 17 Aug 2017 02:34:35 +0000
Subject: [PATCH] [X86] Exchange the memory op predicate for PALIGNR/VPALIGNR.
 I accidentally swapped them.

llvm-svn: 311060
---
 llvm/lib/Target/X86/X86InstrSSE.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index 8f746aa507c2..60cd226bd21e 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -5520,13 +5520,13 @@ multiclass ssse3_palignr<string asm, ValueType VT, RegisterClass RC,
 }
 
 let Predicates = [HasAVX, NoVLX_Or_NoBWI] in
-  defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, memopv2i64,
+  defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, loadv2i64,
                                 i128mem, 0>, VEX_4V, VEX_WIG;
 let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in
   defm VPALIGNRY : ssse3_palignr<"vpalignr", v32i8, VR256, loadv4i64,
                                  i256mem, 0>, VEX_4V, VEX_L, VEX_WIG;
 let Constraints = "$src1 = $dst", Predicates = [UseSSSE3] in
-  defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, loadv2i64,
+  defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, memopv2i64,
                                i128mem>;
 
 //===---------------------------------------------------------------------===//