forked from OSchip/llvm-project
[ARM] Transform compare of masked value to shift on Thumb1.
Thumb1 has very limited immediate modes, so turning an "and" into a shift can save multiple instructions. It's possible to simplify the generated code for test2 and test3 in cmp-and-fold.ll a little more, but I'll implement that as a followup. Differential Revision: https://reviews.llvm.org/D65175 llvm-svn: 367491
This commit is contained in:
Eli Friedman
parent
ad15c1a47a
commit
2f45ec1c39
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@ -4073,6 +4073,43 @@ SDValue ARMTargetLowering::getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
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std::swap(LHS, RHS);
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}
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// Thumb1 has very limited immediate modes, so turning an "and" into a
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// shift can save multiple instructions.
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//
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// If we have (x & C1), and C1 is an appropriate mask, we can transform it
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// into "((x << n) >> n)". But that isn't necessarily profitable on its
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// own. If it's the operand to an unsigned comparison with an immediate,
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// we can eliminate one of the shifts: we transform
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// "((x << n) >> n) == C2" to "(x << n) == (C2 << n)".
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//
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// We avoid transforming cases which aren't profitable due to encoding
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// details:
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//
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// 1. C2 fits into the immediate field of a cmp, and the transformed version
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// would not; in that case, we're essentially trading one immediate load for
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// another.
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// 2. C1 is 255 or 65535, so we can use uxtb or uxth.
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// 3. C2 is zero; we have other code for this special case.
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//
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// FIXME: Figure out profitability for Thumb2; we usually can't save an
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// instruction, since the AND is always one instruction anyway, but we could
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// use narrow instructions in some cases.
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if (Subtarget->isThumb1Only() && LHS->getOpcode() == ISD::AND &&
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LHS->hasOneUse() && isa<ConstantSDNode>(LHS.getOperand(1)) &&
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LHS.getValueType() == MVT::i32 && isa<ConstantSDNode>(RHS) &&
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!isSignedIntSetCC(CC)) {
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unsigned Mask = cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue();
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auto *RHSC = cast<ConstantSDNode>(RHS.getNode());
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uint64_t RHSV = RHSC->getZExtValue();
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if (isMask_32(Mask) && (RHSV & ~Mask) == 0 && Mask != 255 && Mask != 65535) {
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unsigned ShiftBits = countLeadingZeros(Mask);
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if (RHSV && (RHSV > 255 || (RHSV << ShiftBits) <= 255)) {
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SDValue ShiftAmt = DAG.getConstant(ShiftBits, dl, MVT::i32);
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LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt);
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RHS = DAG.getConstant(RHSV << ShiftBits, dl, MVT::i32);
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}
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}
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}
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ARMCC::CondCodes CondCode = IntCCToARMCC(CC);
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// If the RHS is a constant zero then the V (overflow) flag will never be
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@ -0,0 +1,214 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s
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define void @test1(i32 %x, void ()* %f) {
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; CHECK-LABEL: test1:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: lsls r0, r0, #2
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; CHECK-NEXT: cmp r0, #68
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; CHECK-NEXT: beq .LBB0_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB0_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = and i32 %x, 1073741823
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%cmp = icmp eq i32 %a, 17
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test2(i32 %x, void ()* %f) {
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; CHECK-LABEL: test2:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: movs r2, #1
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; CHECK-NEXT: lsls r2, r2, #31
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; CHECK-NEXT: lsls r0, r0, #7
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; CHECK-NEXT: cmp r0, r2
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; CHECK-NEXT: bhi .LBB1_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB1_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = shl i32 %x, 7
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%cmp = icmp ugt i32 %a, 2147483648
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test3(i32 %x, void ()* %f) {
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; CHECK-LABEL: test3:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: movs r2, #1
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; CHECK-NEXT: lsls r2, r2, #31
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; CHECK-NEXT: lsls r0, r0, #2
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; CHECK-NEXT: cmp r0, r2
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; CHECK-NEXT: bhi .LBB2_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB2_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = and i32 %x, 1073741823
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%cmp = icmp ugt i32 %a, 536870912
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test4(i32 %x, void ()* %f) {
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; CHECK-LABEL: test4:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: uxtb r0, r0
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; CHECK-NEXT: cmp r0, #17
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; CHECK-NEXT: beq .LBB3_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB3_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = and i32 %x, 255
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%cmp = icmp eq i32 %a, 17
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test5(i32 %x, void ()* %f) {
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; CHECK-LABEL: test5:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: uxth r0, r0
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; CHECK-NEXT: cmp r0, #17
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; CHECK-NEXT: beq .LBB4_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB4_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = and i32 %x, 65535
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%cmp = icmp eq i32 %a, 17
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test6(i32 %x, void ()* %f) {
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; CHECK-LABEL: test6:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: movs r2, #32
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; CHECK-NEXT: ands r2, r0
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; CHECK-NEXT: cmp r2, #17
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; CHECK-NEXT: beq .LBB5_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB5_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = and i32 %x, 32
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%cmp = icmp eq i32 %a, 17
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test7(i32 %x, void ()* %f) {
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; CHECK-LABEL: test7:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: ldr r2, .LCPI6_0
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; CHECK-NEXT: ands r2, r0
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; CHECK-NEXT: cmp r2, #17
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; CHECK-NEXT: beq .LBB6_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB6_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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; CHECK-NEXT: .p2align 2
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; CHECK-NEXT: @ %bb.3:
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; CHECK-NEXT: .LCPI6_0:
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; CHECK-NEXT: .long 1023 @ 0x3ff
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entry:
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%a = and i32 %x, 1023
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%cmp = icmp eq i32 %a, 17
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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define void @test8(i32 %x, void ()* %f) {
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; CHECK-LABEL: test8:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: movs r2, #129
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; CHECK-NEXT: lsls r2, r2, #23
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; CHECK-NEXT: lsls r0, r0, #22
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; CHECK-NEXT: cmp r0, r2
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; CHECK-NEXT: beq .LBB7_2
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; CHECK-NEXT: @ %bb.1: @ %if.then
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; CHECK-NEXT: blx r1
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; CHECK-NEXT: .LBB7_2: @ %if.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%a = and i32 %x, 1023
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%cmp = icmp eq i32 %a, 258
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br i1 %cmp, label %if.end, label %if.then
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if.then:
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tail call void %f()
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br label %if.end
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if.end:
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ret void
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}
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