forked from OSchip/llvm-project
Add missing builtins to altivec.h for ABI compliance (vol. 1)
This patch corresponds to review: http://reviews.llvm.org/D10637 This is the first round of additions of missing builtins listed in the ABI document. More to come (this builds onto what seurer already addes). This patch adds: vector signed long long vec_abs(vector signed long long) vector double vec_abs(vector double) vector signed long long vec_add(vector signed long long, vector signed long long) vector unsigned long long vec_add(vector unsigned long long, vector unsigned long long) vector double vec_add(vector double, vector double) vector double vec_and(vector bool long long, vector double) vector double vec_and(vector double, vector bool long long) vector double vec_and(vector double, vector double) vector signed long long vec_and(vector signed long long, vector signed long long) vector double vec_andc(vector bool long long, vector double) vector double vec_andc(vector double, vector bool long long) vector double vec_andc(vector double, vector double) vector signed long long vec_andc(vector signed long long, vector signed long long) vector double vec_ceil(vector double) vector bool long long vec_cmpeq(vector double, vector double) vector bool long long vec_cmpge(vector double, vector double) vector bool long long vec_cmpge(vector signed long long, vector signed long long) vector bool long long vec_cmpge(vector unsigned long long, vector unsigned long long) vector bool long long vec_cmpgt(vector double, vector double) vector bool long long vec_cmple(vector double, vector double) vector bool long long vec_cmple(vector signed long long, vector signed long long) vector bool long long vec_cmple(vector unsigned long long, vector unsigned long long) vector bool long long vec_cmplt(vector double, vector double) vector bool long long vec_cmplt(vector signed long long, vector signed long long) vector bool long long vec_cmplt(vector unsigned long long, vector unsigned long long) llvm-svn: 240821
This commit is contained in:
Nemanja Ivanovic
parent
f502a428e6
commit
2f1f926e34
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@ -267,6 +267,18 @@ BUILTIN(__builtin_vsx_xsmindp, "ddd", "")
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BUILTIN(__builtin_vsx_xvdivdp, "V2dV2dV2d", "")
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BUILTIN(__builtin_vsx_xvdivsp, "V4fV4fV4f", "")
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BUILTIN(__builtin_vsx_xvrdpip, "V2dV2d", "")
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BUILTIN(__builtin_vsx_xvrspip, "V4fV4f", "")
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BUILTIN(__builtin_vsx_xvcmpeqdp, "V2ULLiV2dV2d", "")
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BUILTIN(__builtin_vsx_xvcmpeqsp, "V4UiV4fV4f", "")
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BUILTIN(__builtin_vsx_xvcmpgedp, "V2ULLiV2dV2d", "")
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BUILTIN(__builtin_vsx_xvcmpgesp, "V4UiV4fV4f", "")
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BUILTIN(__builtin_vsx_xvcmpgtdp, "V2ULLiV2dV2d", "")
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BUILTIN(__builtin_vsx_xvcmpgtsp, "V4UiV4fV4f", "")
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// HTM builtins
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BUILTIN(__builtin_tbegin, "UiUIi", "")
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BUILTIN(__builtin_tend, "UiUIi", "")
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@ -6560,6 +6560,13 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
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llvm::Function *F = CGM.getIntrinsic(ID);
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return Builder.CreateCall(F, Ops, "");
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}
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case PPC::BI__builtin_vsx_xvrspip:
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case PPC::BI__builtin_vsx_xvrdpip:
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llvm::Type *ResultType = ConvertType(E->getType());
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Value *X = EmitScalarExpr(E->getArg(0));
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ID = Intrinsic::ceil;
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llvm::Function *F = CGM.getIntrinsic(ID, ResultType);
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return Builder.CreateCall(F, X);
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}
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}
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@ -110,14 +110,28 @@ static vector signed int __ATTRS_o_ai vec_abs(vector signed int __a) {
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return __builtin_altivec_vmaxsw(__a, -__a);
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}
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#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
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static vector signed long long __ATTRS_o_ai
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vec_abs(vector signed long long __a) {
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return __builtin_altivec_vmaxsd(__a, -__a);
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}
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#endif
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static vector float __ATTRS_o_ai vec_abs(vector float __a) {
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vector unsigned int __res =
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(vector unsigned int)__a & (vector unsigned int)(0x7FFFFFFF);
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return (vector float)__res;
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}
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/* vec_abss */
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#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
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static vector double __ATTRS_o_ai vec_abs(vector double __a) {
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vector unsigned long long __res = { 0x7FFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFF };
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__res &= (vector unsigned int)__a;
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return (vector double)__res;
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}
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#endif
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/* vec_abss */
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#define __builtin_altivec_abss_v16qi vec_abss
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#define __builtin_altivec_abss_v8hi vec_abss
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#define __builtin_altivec_abss_v4si vec_abss
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@ -226,6 +240,16 @@ static vector unsigned int __ATTRS_o_ai vec_add(vector unsigned int __a,
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}
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#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
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static vector signed long long __ATTRS_o_ai
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vec_add(vector signed long long __a, vector signed long long __b) {
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return __a + __b;
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}
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static vector unsigned long long __ATTRS_o_ai
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vec_add(vector unsigned long long __a, vector unsigned long long __b) {
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return __a + __b;
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}
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static vector signed __int128 __ATTRS_o_ai vec_add(vector signed __int128 __a,
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vector signed __int128 __b) {
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return __a + __b;
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@ -241,6 +265,13 @@ static vector float __ATTRS_o_ai vec_add(vector float __a, vector float __b) {
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return __a + __b;
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}
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#ifdef __VSX__
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static vector double __ATTRS_o_ai
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vec_add(vector double __a, vector double __b) {
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return __a + __b;
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}
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#endif // __VSX__
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/* vec_vaddubm */
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#define __builtin_altivec_vaddubm vec_vaddubm
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@ -746,6 +777,24 @@ static vector float __ATTRS_o_ai vec_and(vector float __a,
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}
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#ifdef __VSX__
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static vector double __ATTRS_o_ai vec_and(vector bool long long __a, vector double __b) {
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vector unsigned long long __res =
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(vector unsigned long long)__a & (vector unsigned long long)__b;
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return (vector double)__res;
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}
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static vector double __ATTRS_o_ai vec_and(vector double __a, vector bool long long __b) {
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vector unsigned long long __res =
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(vector unsigned long long)__a & (vector unsigned long long)__b;
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return (vector double)__res;
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}
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static vector double __ATTRS_o_ai vec_and(vector double __a, vector double __b) {
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vector unsigned long long __res =
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(vector unsigned long long)__a & (vector unsigned long long)__b;
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return (vector double)__res;
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}
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static vector signed long long __ATTRS_o_ai
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vec_and(vector signed long long __a, vector signed long long __b) {
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return __a & __b;
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@ -1068,6 +1117,26 @@ static vector float __ATTRS_o_ai vec_andc(vector float __a,
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}
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#ifdef __VSX__
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static vector double __ATTRS_o_ai
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vec_andc(vector bool long long __a, vector double __b) {
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vector unsigned long long __res =
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(vector unsigned long long)__a & ~(vector unsigned long long)__b;
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return (vector double)__res;
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}
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static vector double __ATTRS_o_ai
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vec_andc(vector double __a, vector bool long long __b) {
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vector unsigned long long __res =
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(vector unsigned long long)__a & ~(vector unsigned long long)__b;
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return (vector double)__res;
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}
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static vector double __ATTRS_o_ai vec_andc(vector double __a, vector double __b) {
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vector unsigned long long __res =
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(vector unsigned long long)__a & ~(vector unsigned long long)__b;
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return (vector double)__res;
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}
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static vector signed long long __ATTRS_o_ai
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vec_andc(vector signed long long __a, vector signed long long __b) {
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return __a & ~__b;
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@ -1338,11 +1407,20 @@ vec_vavguw(vector unsigned int __a, vector unsigned int __b) {
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/* vec_ceil */
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static vector float __attribute__((__always_inline__))
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vec_ceil(vector float __a) {
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static vector float __ATTRS_o_ai vec_ceil(vector float __a) {
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#ifdef __VSX__
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return __builtin_vsx_xvrspip(__a);
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#else
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return __builtin_altivec_vrfip(__a);
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#endif
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}
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#ifdef __VSX__
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static vector double __ATTRS_o_ai vec_ceil(vector double __a) {
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return __builtin_vsx_xvrdpip(__a);
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}
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#endif
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/* vec_vrfip */
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static vector float __attribute__((__always_inline__))
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@ -1414,16 +1492,56 @@ vec_cmpeq(vector unsigned long long __a, vector unsigned long long __b) {
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static vector bool int __ATTRS_o_ai vec_cmpeq(vector float __a,
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vector float __b) {
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#ifdef __VSX__
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return (vector bool int)__builtin_vsx_xvcmpeqsp(__a, __b);
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#else
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return (vector bool int)__builtin_altivec_vcmpeqfp(__a, __b);
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#endif
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}
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#ifdef __VSX__
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static vector bool long long __ATTRS_o_ai
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vec_cmpeq(vector double __a, vector double __b) {
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return (vector bool long long)__builtin_vsx_xvcmpeqdp(__a, __b);
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}
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#endif
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/* vec_cmpge */
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static vector bool int __attribute__((__always_inline__))
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static vector bool int __ATTRS_o_ai
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vec_cmpge(vector float __a, vector float __b) {
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#ifdef __VSX__
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return (vector bool int)__builtin_vsx_xvcmpgesp(__a, __b);
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#else
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return (vector bool int)__builtin_altivec_vcmpgefp(__a, __b);
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#endif
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}
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#ifdef __VSX__
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static vector bool long long __ATTRS_o_ai
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vec_cmpge(vector double __a, vector double __b) {
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return (vector bool long long)__builtin_vsx_xvcmpgedp(__a, __b);
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}
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#endif
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#ifdef __POWER8_VECTOR__
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/* Forwrad declarations as the functions are used here */
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static vector bool long long __ATTRS_o_ai
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vec_cmpgt(vector unsigned long long __a, vector unsigned long long __b);
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static vector bool long long __ATTRS_o_ai
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vec_cmpgt(vector signed long long __a, vector signed long long __b);
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static vector bool long long __ATTRS_o_ai
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vec_cmpge(vector signed long long __a, vector signed long long __b) {
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return ~(vec_cmpgt(__b, __a));
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}
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static vector bool long long __ATTRS_o_ai
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vec_cmpge(vector unsigned long long __a, vector unsigned long long __b) {
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return ~(vec_cmpgt(__b, __a));
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}
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#endif
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/* vec_vcmpgefp */
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static vector bool int __attribute__((__always_inline__))
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@ -1476,9 +1594,19 @@ vec_cmpgt(vector unsigned long long __a, vector unsigned long long __b) {
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static vector bool int __ATTRS_o_ai vec_cmpgt(vector float __a,
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vector float __b) {
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#ifdef __VSX__
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return (vector bool int)__builtin_vsx_xvcmpgtsp(__a, __b);
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#else
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return (vector bool int)__builtin_altivec_vcmpgtfp(__a, __b);
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#endif
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}
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#ifdef __VSX__
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static vector bool long long __ATTRS_o_ai
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vec_cmpgt(vector double __a, vector double __b) {
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return (vector bool long long)__builtin_vsx_xvcmpgtdp(__a, __b);
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}
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#endif
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/* vec_vcmpgtsb */
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static vector bool char __attribute__((__always_inline__))
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@ -1530,47 +1658,85 @@ vec_vcmpgtfp(vector float __a, vector float __b) {
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/* vec_cmple */
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static vector bool int __attribute__((__always_inline__))
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static vector bool int __ATTRS_o_ai
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vec_cmple(vector float __a, vector float __b) {
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return (vector bool int)__builtin_altivec_vcmpgefp(__b, __a);
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return vec_cmpge(__b, __a);
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}
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#ifdef __VSX__
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static vector bool long long __ATTRS_o_ai
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vec_cmple(vector double __a, vector double __b) {
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return vec_cmpge(__b, __a);
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}
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#endif
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#ifdef __POWER8_VECTOR__
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static vector bool long long __ATTRS_o_ai
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vec_cmple(vector signed long long __a, vector signed long long __b) {
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return vec_cmpge(__b, __a);
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}
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static vector bool long long __ATTRS_o_ai
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vec_cmple(vector unsigned long long __a, vector unsigned long long __b) {
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return vec_cmpge(__b, __a);
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}
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#endif
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/* vec_cmplt */
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static vector bool char __ATTRS_o_ai vec_cmplt(vector signed char __a,
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vector signed char __b) {
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return (vector bool char)__builtin_altivec_vcmpgtsb(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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static vector bool char __ATTRS_o_ai vec_cmplt(vector unsigned char __a,
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vector unsigned char __b) {
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return (vector bool char)__builtin_altivec_vcmpgtub(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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static vector bool short __ATTRS_o_ai vec_cmplt(vector short __a,
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vector short __b) {
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return (vector bool short)__builtin_altivec_vcmpgtsh(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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static vector bool short __ATTRS_o_ai vec_cmplt(vector unsigned short __a,
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vector unsigned short __b) {
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return (vector bool short)__builtin_altivec_vcmpgtuh(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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static vector bool int __ATTRS_o_ai vec_cmplt(vector int __a, vector int __b) {
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return (vector bool int)__builtin_altivec_vcmpgtsw(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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static vector bool int __ATTRS_o_ai vec_cmplt(vector unsigned int __a,
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vector unsigned int __b) {
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return (vector bool int)__builtin_altivec_vcmpgtuw(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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static vector bool int __ATTRS_o_ai vec_cmplt(vector float __a,
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vector float __b) {
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return (vector bool int)__builtin_altivec_vcmpgtfp(__b, __a);
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return vec_cmpgt(__b, __a);
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}
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#ifdef __VSX__
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static vector bool long long __ATTRS_o_ai
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vec_cmplt(vector double __a, vector double __b) {
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return vec_cmpgt(__b, __a);
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}
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#endif
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#ifdef __POWER8_VECTOR__
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static vector bool long long __ATTRS_o_ai
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vec_cmplt(vector signed long long __a, vector signed long long __b) {
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return vec_cmpgt(__b, __a);
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}
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static vector bool long long __ATTRS_o_ai
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vec_cmplt(vector unsigned long long __a, vector unsigned long long __b) {
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return vec_cmpgt(__b, __a);
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}
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#endif
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/* vec_ctf */
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static vector float __ATTRS_o_ai vec_ctf(vector int __a, int __b) {
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@ -1,7 +1,11 @@
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// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -faltivec -target-feature +power8-vector -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -faltivec -target-feature +power8-vector -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-LE
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// RUN: not %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s -check-prefix=CHECK-PPC
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// RUN: not %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s -check-prefix=CHECK-PPC
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// Added -target-feature +vsx above to avoid errors about "vector double" and to
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// generate the correct errors for functions that are only overloaded with VSX
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// (vec_cmpge, vec_cmple). Without this option, there is only one overload so
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// it is selected.
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vector signed char vsc = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 5 };
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vector unsigned char vuc = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 5 };
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@ -11,6 +15,7 @@ vector bool int vbi = {0, -1, -1, 0};
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vector bool long long vbll = { 1, 0 };
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vector signed long long vsll = { 1, 2 };
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vector unsigned long long vull = { 1, 2 };
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vector double vda = { 1.e-11, -132.23e10 };
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int res_i;
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vector signed char res_vsc;
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@ -21,10 +26,35 @@ vector bool int res_vbi;
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vector bool long long res_vbll;
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vector signed long long res_vsll;
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vector unsigned long long res_vull;
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vector double res_vd;
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// CHECK-LABEL: define void @test1
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void test1() {
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/* vec_abs */
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res_vsll = vec_abs(vsll);
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// CHECK: call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %{{[0-9]]*}}, <2 x i64>
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// CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %{{[0-9]]*}}, <2 x i64>
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// CHECK-PPC: error: call to 'vec_abs' is ambiguous
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res_vd = vec_abs(vda);
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// CHECK: store <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64>*
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// CHECK: and <2 x i64>
|
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// CHECK-LE: store <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64>*
|
||||
// CHECK-LE: and <2 x i64>
|
||||
// CHECK-PPC: error: call to 'vec_abs' is ambiguous
|
||||
|
||||
/* vec_add */
|
||||
res_vsll = vec_add(vsll, vsll);
|
||||
// CHECK: add <2 x i64>
|
||||
// CHECK-LE: add <2 x i64>
|
||||
// CHECK-PPC: error: call to 'vec_add' is ambiguous
|
||||
|
||||
res_vull = vec_add(vull, vull);
|
||||
// CHECK: add <2 x i64>
|
||||
// CHECK-LE: add <2 x i64>
|
||||
// CHECK-PPC: error: call to 'vec_add' is ambiguous
|
||||
|
||||
/* vec_cmpeq */
|
||||
res_vbll = vec_cmpeq(vsll, vsll);
|
||||
// CHECK: @llvm.ppc.altivec.vcmpequd
|
||||
|
|
@ -36,6 +66,28 @@ void test1() {
|
|||
// CHECK-LE: @llvm.ppc.altivec.vcmpequd
|
||||
// CHECK-PPC: error: call to 'vec_cmpeq' is ambiguous
|
||||
|
||||
/* vec_cmpge */
|
||||
res_vbll = vec_cmpge(vsll, vsll);
|
||||
// CHECK: @llvm.ppc.altivec.vcmpgtsd
|
||||
// CHECK-LE: @llvm.ppc.altivec.vcmpgtsd
|
||||
// CHECK-PPC: error: call to 'vec_cmpge' is ambiguous
|
||||
|
||||
res_vbll = vec_cmpge(vull, vull);
|
||||
// CHECK: @llvm.ppc.altivec.vcmpgtud
|
||||
// CHECK-LE: @llvm.ppc.altivec.vcmpgtud
|
||||
// CHECK-PPC: error: call to 'vec_cmpge' is ambiguous
|
||||
|
||||
/* vec_cmple */
|
||||
res_vbll = vec_cmple(vsll, vsll);
|
||||
// CHECK: @llvm.ppc.altivec.vcmpgtsd
|
||||
// CHECK-LE: @llvm.ppc.altivec.vcmpgtsd
|
||||
// CHECK-PPC: error: call to 'vec_cmple' is ambiguous
|
||||
|
||||
res_vbll = vec_cmple(vull, vull);
|
||||
// CHECK: @llvm.ppc.altivec.vcmpgtud
|
||||
// CHECK-LE: @llvm.ppc.altivec.vcmpgtud
|
||||
// CHECK-PPC: error: call to 'vec_cmple' is ambiguous
|
||||
|
||||
/* vec_cmpgt */
|
||||
res_vbll = vec_cmpgt(vsll, vsll);
|
||||
// CHECK: @llvm.ppc.altivec.vcmpgtsd
|
||||
|
|
@ -47,6 +99,17 @@ void test1() {
|
|||
// CHECK-LE: @llvm.ppc.altivec.vcmpgtud
|
||||
// CHECK-PPC: error: call to 'vec_cmpgt' is ambiguous
|
||||
|
||||
/* vec_cmplt */
|
||||
res_vbll = vec_cmplt(vsll, vsll);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.altivec.vcmpgtsd(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}})
|
||||
// CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vcmpgtsd(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}})
|
||||
// CHECK-PPC: error: call to 'vec_cmplt' is ambiguous
|
||||
|
||||
res_vbll = vec_cmplt(vull, vull);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.altivec.vcmpgtud(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}})
|
||||
// CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vcmpgtud(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}})
|
||||
// CHECK-PPC: error: call to 'vec_cmplt' is ambiguous
|
||||
|
||||
/* ----------------------- predicates --------------------------- */
|
||||
/* vec_all_eq */
|
||||
res_i = vec_all_eq(vsll, vsll);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
// REQUIRES: powerpc-registered-target
|
||||
// RUN: %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
|
||||
// RUN: %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s
|
||||
|
||||
vector unsigned char vuc = { 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
0, 1, 2, 3, 4, 5, 6, 7};
|
||||
|
|
@ -16,14 +17,98 @@ vector float res_vf;
|
|||
vector double res_vd;
|
||||
vector signed int res_vsi;
|
||||
vector unsigned int res_vui;
|
||||
vector bool int res_vbi;
|
||||
vector bool long long res_vbll;
|
||||
vector signed long long res_vsll;
|
||||
vector unsigned long long res_vull;
|
||||
double res_d;
|
||||
|
||||
void dummy() { }
|
||||
|
||||
void test1() {
|
||||
// CHECK-LABEL: define void @test1
|
||||
|
||||
res_vd = vec_add(vd, vd);
|
||||
// CHECK: fadd <2 x double>
|
||||
|
||||
res_vd = vec_and(vbll, vd);
|
||||
// CHECK: and <2 x i64>
|
||||
// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>
|
||||
|
||||
res_vd = vec_and(vd, vbll);
|
||||
// CHECK: and <2 x i64>
|
||||
// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>
|
||||
|
||||
res_vd = vec_and(vd, vd);
|
||||
// CHECK: and <2 x i64>
|
||||
// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>
|
||||
|
||||
dummy();
|
||||
// CHECK: call void @dummy()
|
||||
|
||||
res_vd = vec_andc(vbll, vd);
|
||||
// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64>
|
||||
// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1>
|
||||
// CHECK: and <2 x i64>
|
||||
// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>
|
||||
|
||||
dummy();
|
||||
// CHECK: call void @dummy()
|
||||
|
||||
res_vd = vec_andc(vd, vbll);
|
||||
// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64>
|
||||
// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1>
|
||||
// CHECK: and <2 x i64>
|
||||
// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>
|
||||
|
||||
dummy();
|
||||
// CHECK: call void @dummy()
|
||||
|
||||
res_vd = vec_andc(vd, vd);
|
||||
// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64>
|
||||
// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1>
|
||||
// CHECK: and <2 x i64>
|
||||
// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double>
|
||||
|
||||
dummy();
|
||||
// CHECK: call void @dummy()
|
||||
|
||||
res_vd = vec_ceil(vd);
|
||||
// CHECK: call <2 x double> @llvm.ceil.v2f64(<2 x double> %{{[0-9]*}})
|
||||
|
||||
res_vf = vec_ceil(vf);
|
||||
// CHECK: call <4 x float> @llvm.ceil.v4f32(<4 x float> %{{[0-9]*}})
|
||||
|
||||
res_vbll = vec_cmpeq(vd, vd);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpeqdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}})
|
||||
|
||||
res_vbi = vec_cmpeq(vf, vf);
|
||||
// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpeqsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}})
|
||||
|
||||
res_vbll = vec_cmpge(vd, vd);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}})
|
||||
|
||||
res_vbi = vec_cmpge(vf, vf);
|
||||
// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}})
|
||||
|
||||
res_vbll = vec_cmpgt(vd, vd);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}})
|
||||
|
||||
res_vbi = vec_cmpgt(vf, vf);
|
||||
// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}})
|
||||
|
||||
res_vbll = vec_cmple(vd, vd);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}})
|
||||
|
||||
res_vbi = vec_cmple(vf, vf);
|
||||
// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}})
|
||||
|
||||
res_vbll = vec_cmplt(vd, vd);
|
||||
// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}})
|
||||
|
||||
res_vbi = vec_cmplt(vf, vf);
|
||||
// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}})
|
||||
|
||||
/* vec_div */
|
||||
res_vf = vec_div(vf, vf);
|
||||
// CHECK: @llvm.ppc.vsx.xvdivsp
|
||||
|
|
|
|||
Loading…
Reference in New Issue