From 2f023b94552ba0e53ad8cdc801eb0068c399d6da Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 31 Jan 2022 23:01:26 -0800 Subject: [PATCH] [RISCV] Don't make it an error have Zve* and V at the same time. This should not be an error. V is a valid implementation of Zve. Spec clarified here https://github.com/riscv/riscv-v-spec/commit/9a877e8553362ff03a9b22b98e321b59aff50398 Differential Revision: https://reviews.llvm.org/D118679 --- llvm/lib/Support/RISCVISAInfo.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp index 8cdce750bdae..2b3395b669b8 100644 --- a/llvm/lib/Support/RISCVISAInfo.cpp +++ b/llvm/lib/Support/RISCVISAInfo.cpp @@ -723,12 +723,6 @@ Error RISCVISAInfo::checkDependency() { errc::invalid_argument, "zvl*b requires v or zve* extension to also be specified"); - // Could not implement Zve* extension and the V extension at the same time. - if (HasZve32x && HasV) - return createStringError( - errc::invalid_argument, - "It is illegal to specify the v extension with zve* extensions"); - // Additional dependency checks. // TODO: The 'q' extension requires rv64. // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'.