forked from OSchip/llvm-project
DAG: Remove redundant handling of reg fixups
It looks like 9cac4e6d14
accidentally
added a second copy of this from a bad rebase or something. This
second copy was added, and the finalizeLowering call was not deleted
as intended.
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parent
ac0af12ed2
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@ -661,34 +661,6 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
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// Determine if floating point is used for msvc
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computeUsesMSVCFloatingPoint(TM.getTargetTriple(), Fn, MF->getMMI());
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// Replace forward-declared registers with the registers containing
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// the desired value.
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for (DenseMap<Register, Register>::iterator
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I = FuncInfo->RegFixups.begin(), E = FuncInfo->RegFixups.end();
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I != E; ++I) {
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Register From = I->first;
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Register To = I->second;
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// If To is also scheduled to be replaced, find what its ultimate
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// replacement is.
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while (true) {
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DenseMap<Register, Register>::iterator J = FuncInfo->RegFixups.find(To);
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if (J == E) break;
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To = J->second;
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}
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// Make sure the new register has a sufficiently constrained register class.
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if (Register::isVirtualRegister(From) && Register::isVirtualRegister(To))
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MRI.constrainRegClass(To, MRI.getRegClass(From));
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// Replace it.
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// Replacing one register with another won't touch the kill flags.
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// We need to conservatively clear the kill flags as a kill on the old
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// register might dominate existing uses of the new register.
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if (!MRI.use_empty(To))
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MRI.clearKillFlags(From);
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MRI.replaceRegWith(From, To);
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}
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TLI->finalizeLowering(*MF);
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// Release function-specific state. SDB and CurDAG are already cleared
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