forked from OSchip/llvm-project
[WebAssembly] Saturating float to int intrinsics
Summary: Although the saturating float to int instructions are already emitted from normal IR, the fpto{s,u}i instructions produce poison values if the argument cannot fit in the result type. These intrinsics are therefore necessary to get guaranteed defined saturating behavior. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53004 llvm-svn: 344204
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@ -36,6 +36,17 @@ def int_wasm_mem_grow : Intrinsic<[llvm_anyint_ty],
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def int_wasm_current_memory : Intrinsic<[llvm_anyint_ty], [], [IntrReadMem]>;
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def int_wasm_grow_memory : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], []>;
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//===----------------------------------------------------------------------===//
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// Saturating float-to-int conversions
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//===----------------------------------------------------------------------===//
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def int_wasm_trunc_saturate_signed : Intrinsic<[llvm_anyint_ty],
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[llvm_anyfloat_ty],
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[IntrNoMem, IntrSpeculatable]>;
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def int_wasm_trunc_saturate_unsigned : Intrinsic<[llvm_anyint_ty],
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[llvm_anyfloat_ty],
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[IntrNoMem, IntrSpeculatable]>;
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//===----------------------------------------------------------------------===//
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// Exception handling intrinsics
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//===----------------------------------------------------------------------===//
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@ -97,6 +97,24 @@ defm I64_TRUNC_U_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
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"i64.trunc_u:sat/f64", 0xfc07>,
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Requires<[HasNontrappingFPToInt]>;
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// Lower llvm.wasm.trunc.saturate.* to saturating instructions
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def : Pat<(int_wasm_trunc_saturate_signed F32:$src),
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(I32_TRUNC_S_SAT_F32 F32:$src)>;
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def : Pat<(int_wasm_trunc_saturate_unsigned F32:$src),
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(I32_TRUNC_U_SAT_F32 F32:$src)>;
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def : Pat<(int_wasm_trunc_saturate_signed F64:$src),
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(I32_TRUNC_S_SAT_F64 F64:$src)>;
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def : Pat<(int_wasm_trunc_saturate_unsigned F64:$src),
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(I32_TRUNC_U_SAT_F64 F64:$src)>;
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def : Pat<(int_wasm_trunc_saturate_signed F32:$src),
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(I64_TRUNC_S_SAT_F32 F32:$src)>;
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def : Pat<(int_wasm_trunc_saturate_unsigned F32:$src),
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(I64_TRUNC_U_SAT_F32 F32:$src)>;
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def : Pat<(int_wasm_trunc_saturate_signed F64:$src),
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(I64_TRUNC_S_SAT_F64 F64:$src)>;
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def : Pat<(int_wasm_trunc_saturate_unsigned F64:$src),
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(I64_TRUNC_U_SAT_F64 F64:$src)>;
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// Conversion from floating point to integer pseudo-instructions which don't
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// trap on overflow or invalid.
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let usesCustomInserter = 1, isCodeGenOnly = 1 in {
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@ -782,6 +782,16 @@ defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_sat_u/f32x4", 148>;
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defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_sat_s/f64x2", 149>;
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defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_sat_u/f64x2", 150>;
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// Lower llvm.wasm.trunc.saturate.* to saturating instructions
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def : Pat<(v4i32 (int_wasm_trunc_saturate_signed (v4f32 V128:$src))),
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(fp_to_sint_v4i32_v4f32 (v4f32 V128:$src))>;
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def : Pat<(v4i32 (int_wasm_trunc_saturate_unsigned (v4f32 V128:$src))),
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(fp_to_uint_v4i32_v4f32 (v4f32 V128:$src))>;
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def : Pat<(v2i64 (int_wasm_trunc_saturate_signed (v2f64 V128:$src))),
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(fp_to_sint_v2i64_v2f64 (v2f64 V128:$src))>;
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def : Pat<(v2i64 (int_wasm_trunc_saturate_unsigned (v2f64 V128:$src))),
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(fp_to_uint_v2i64_v2f64 (v2f64 V128:$src))>;
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// Bitcasts are nops
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// Matching bitcast t1 to t1 causes strange errors, so avoid repeating types
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foreach t1 = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in
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@ -45,6 +45,17 @@ define i32 @i32_trunc_s_f32(float %x) {
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_sat_s_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i32 @llvm.wasm.trunc.saturate.signed.i32.f32(float)
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define i32 @i32_trunc_sat_s_f32(float %x) {
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%a = call i32 @llvm.wasm.trunc.saturate.signed.i32.f32(float %x)
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_u_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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@ -55,6 +66,17 @@ define i32 @i32_trunc_u_f32(float %x) {
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_sat_u_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i32 @llvm.wasm.trunc.saturate.unsigned.i32.f32(float)
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define i32 @i32_trunc_sat_u_f32(float %x) {
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%a = call i32 @llvm.wasm.trunc.saturate.unsigned.i32.f32(float %x)
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_s_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i32{{$}}
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@ -65,6 +87,17 @@ define i32 @i32_trunc_s_f64(double %x) {
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_sat_s_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i32 @llvm.wasm.trunc.saturate.signed.i32.f64(double)
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define i32 @i32_trunc_sat_s_f64(double %x) {
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%a = call i32 @llvm.wasm.trunc.saturate.signed.i32.f64(double %x)
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_u_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i32{{$}}
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@ -75,6 +108,17 @@ define i32 @i32_trunc_u_f64(double %x) {
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ret i32 %a
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}
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; CHECK-LABEL: i32_trunc_sat_u_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i32 @llvm.wasm.trunc.saturate.unsigned.i32.f64(double)
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define i32 @i32_trunc_sat_u_f64(double %x) {
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%a = call i32 @llvm.wasm.trunc.saturate.unsigned.i32.f64(double %x)
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ret i32 %a
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}
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; CHECK-LABEL: i64_trunc_s_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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@ -85,6 +129,17 @@ define i64 @i64_trunc_s_f32(float %x) {
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_sat_s_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i64 @llvm.wasm.trunc.saturate.signed.i64.f32(float)
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define i64 @i64_trunc_sat_s_f32(float %x) {
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%a = call i64 @llvm.wasm.trunc.saturate.signed.i64.f32(float %x)
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_u_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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@ -95,6 +150,17 @@ define i64 @i64_trunc_u_f32(float %x) {
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_sat_u_f32:
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; CHECK-NEXT: .param f32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i64 @llvm.wasm.trunc.saturate.unsigned.i64.f32(float)
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define i64 @i64_trunc_sat_u_f32(float %x) {
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%a = call i64 @llvm.wasm.trunc.saturate.unsigned.i64.f32(float %x)
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_s_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i64{{$}}
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@ -105,6 +171,17 @@ define i64 @i64_trunc_s_f64(double %x) {
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_sat_s_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i64 @llvm.wasm.trunc.saturate.signed.i64.f64(double)
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define i64 @i64_trunc_sat_s_f64(double %x) {
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%a = call i64 @llvm.wasm.trunc.saturate.signed.i64.f64(double %x)
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_u_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i64{{$}}
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@ -115,6 +192,17 @@ define i64 @i64_trunc_u_f64(double %x) {
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ret i64 %a
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}
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; CHECK-LABEL: i64_trunc_sat_u_f64:
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; CHECK-NEXT: .param f64{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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declare i64 @llvm.wasm.trunc.saturate.unsigned.i64.f64(double)
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define i64 @i64_trunc_sat_u_f64(double %x) {
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%a = call i64 @llvm.wasm.trunc.saturate.unsigned.i64.f64(double %x)
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ret i64 %a
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}
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; CHECK-LABEL: f32_convert_s_i32:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result f32{{$}}
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@ -226,6 +226,30 @@ define <4 x i32> @bitselect_v4i32(<4 x i32> %c, <4 x i32> %v1, <4 x i32> %v2) {
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ret <4 x i32> %a
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}
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; CHECK-LABEL: trunc_sat_s_v4i32:
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; NO-SIMD128-NOT: f32x4
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; SIMD128-NEXT: .param v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
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; SIMD128-NEXT: return $pop[[R]]
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declare <4 x i32> @llvm.wasm.trunc.saturate.signed.v4i32.v4f32(<4 x float>)
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define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
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%a = call <4 x i32> @llvm.wasm.trunc.saturate.signed.v4i32.v4f32(<4 x float> %x)
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ret <4 x i32> %a
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}
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; CHECK-LABEL: trunc_sat_u_v4i32:
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; NO-SIMD128-NOT: f32x4
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; SIMD128-NEXT: .param v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
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; SIMD128-NEXT: return $pop[[R]]
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declare <4 x i32> @llvm.wasm.trunc.saturate.unsigned.v4i32.v4f32(<4 x float>)
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define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
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%a = call <4 x i32> @llvm.wasm.trunc.saturate.unsigned.v4i32.v4f32(<4 x float> %x)
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ret <4 x i32> %a
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}
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; ==============================================================================
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; 2 x i64
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; ==============================================================================
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ret <2 x i64> %a
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}
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; CHECK-LABEL: trunc_sat_s_v2i64:
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; NO-SIMD128-NOT: f32x4
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; SIMD128-NEXT: .param v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
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; SIMD128-NEXT: return $pop[[R]]
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declare <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double>)
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define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
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%a = call <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double> %x)
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ret <2 x i64> %a
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}
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; CHECK-LABEL: trunc_sat_u_v2i64:
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; NO-SIMD128-NOT: f32x4
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; SIMD128-NEXT: .param v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
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; SIMD128-NEXT: return $pop[[R]]
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declare <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double>)
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define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
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%a = call <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double> %x)
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ret <2 x i64> %a
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}
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; ==============================================================================
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; 4 x f32
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; ==============================================================================
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