forked from OSchip/llvm-project
[InstCombine] allow more binop (shuffle X), C transforms
The canonicalization was restricted to shuffle masks with a 1-to-1 mapping to the constant vector, but that disqualifies the common splat pattern. This is part of solving PR37463: https://bugs.llvm.org/show_bug.cgi?id=37463 llvm-svn: 332479
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@ -1401,7 +1401,8 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) {
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// Find constant NewC that has property:
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// shuffle(NewC, ShMask) = C
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// If such constant does not exist (example: ShMask=<0,0> and C=<1,2>)
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// reorder is not possible.
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// reorder is not possible. A 1-to-1 mapping is not required. Example:
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// ShMask = <1,1,2,2> and C = <5,5,6,6> --> NewC = <undef,5,6,undef>
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SmallVector<int, 16> ShMask;
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ShuffleVectorInst::getShuffleMask(Mask, ShMask);
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SmallVector<Constant *, 16>
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@ -1411,7 +1412,8 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) {
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if (ShMask[I] >= 0) {
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assert(ShMask[I] < (int)VWidth);
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Constant *CElt = C->getAggregateElement(I);
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if (!CElt || !isa<UndefValue>(NewVecC[ShMask[I]])) {
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Constant *NewCElt = NewVecC[ShMask[I]];
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if (!CElt || (!isa<UndefValue>(NewCElt) && NewCElt != CElt)) {
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MayChange = false;
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break;
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}
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@ -439,9 +439,9 @@ define <2 x float> @fadd_const_multiuse(<2 x float> %v) {
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define <4 x i32> @mul_const_splat(<4 x i32> %v) {
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; CHECK-LABEL: @mul_const_splat(
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; CHECK-NEXT: [[T1:%.*]] = shufflevector <4 x i32> [[V:%.*]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[R:%.*]] = mul <4 x i32> [[T1]], <i32 42, i32 42, i32 42, i32 42>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i32> [[V:%.*]], <i32 undef, i32 42, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: ret <4 x i32> [[TMP2]]
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;
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%t1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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%r = mul <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %t1
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@ -452,15 +452,28 @@ define <4 x i32> @mul_const_splat(<4 x i32> %v) {
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define <4 x i32> @lshr_const_half_splat(<4 x i32> %v) {
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; CHECK-LABEL: @lshr_const_half_splat(
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; CHECK-NEXT: [[T1:%.*]] = shufflevector <4 x i32> [[V:%.*]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
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; CHECK-NEXT: [[R:%.*]] = lshr <4 x i32> <i32 8, i32 8, i32 9, i32 9>, [[T1]]
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; CHECK-NEXT: ret <4 x i32> [[R]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr <4 x i32> <i32 undef, i32 8, i32 9, i32 undef>, [[V:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
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; CHECK-NEXT: ret <4 x i32> [[TMP2]]
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;
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%t1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
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%r = lshr <4 x i32> <i32 8, i32 8, i32 9, i32 9>, %t1
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ret <4 x i32> %r
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}
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; We can't change this because there's no pre-shuffle version of the fmul constant.
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define <2 x float> @fmul_const_invalid_constant(<2 x float> %v) {
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; CHECK-LABEL: @fmul_const_invalid_constant(
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; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V:%.*]], <2 x float> undef, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[R:%.*]] = fmul <2 x float> [[T1]], <float 4.100000e+01, float 4.200000e+01>
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; CHECK-NEXT: ret <2 x float> [[R]]
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;
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%t1 = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 0, i32 0>
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%r = fmul <2 x float> %t1, <float 41.0, float 42.0>
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ret <2 x float> %r
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}
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define <4 x i32> @shuffle_17add2(<4 x i32> %v) {
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; CHECK-LABEL: @shuffle_17add2(
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; CHECK-NEXT: [[TMP1:%.*]] = shl <4 x i32> [[V:%.*]], <i32 1, i32 1, i32 1, i32 1>
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