[AVX-512] Remove masked 128/256-bit sqrt builtins and replace them with unmasked builtins and a select.

llvm-svn: 285504
This commit is contained in:
Craig Topper 2016-10-29 19:02:10 +00:00
parent 09e94007be
commit 2eadf1b67e
3 changed files with 48 additions and 48 deletions

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@ -1251,10 +1251,6 @@ TARGET_BUILTIN(__builtin_ia32_scattersiv4si, "vi*UcV4iV4iIi", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_scattersiv8sf, "vf*UcV8iV8fIi", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_scattersiv8si, "vi*UcV8iV8iIi", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_sqrtpd128_mask, "V2dV2dV2dUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_sqrtpd256_mask, "V4dV4dV4dUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_sqrtps128_mask, "V4fV4fV4fUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_sqrtps256_mask, "V8fV8fV8fUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermi2vard128_mask, "V4iV4iV4iV4iUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermi2vard256_mask, "V8iV8iV8iV8iUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermi2varpd128_mask, "V2dV2dV2LLiV2dUc", "", "avx512vl")

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@ -3955,63 +3955,59 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
(__v8si)(__m256i)(v1), (int)(scale)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mask_sqrt_pd (__m128d __W, __mmask8 __U, __m128d __A) {
return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
(__v2df) __W,
(__mmask8) __U);
_mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) {
return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
(__v2df)_mm_sqrt_pd(__A),
(__v2df)__W);
}
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_maskz_sqrt_pd (__mmask8 __U, __m128d __A) {
return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
(__v2df)
_mm_setzero_pd (),
(__mmask8) __U);
_mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) {
return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
(__v2df)_mm_sqrt_pd(__A),
(__v2df)_mm_setzero_pd());
}
static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_mask_sqrt_pd (__m256d __W, __mmask8 __U, __m256d __A) {
return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
(__v4df) __W,
(__mmask8) __U);
_mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) {
return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
(__v4df)_mm256_sqrt_pd(__A),
(__v4df)__W);
}
static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_maskz_sqrt_pd (__mmask8 __U, __m256d __A) {
return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
(__v4df)
_mm256_setzero_pd (),
(__mmask8) __U);
_mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) {
return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
(__v4df)_mm256_sqrt_pd(__A),
(__v4df)_mm256_setzero_pd());
}
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_mask_sqrt_ps (__m128 __W, __mmask8 __U, __m128 __A) {
return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
(__v4sf) __W,
(__mmask8) __U);
_mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) {
return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
(__v4sf)_mm_sqrt_ps(__A),
(__v4sf)__W);
}
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_maskz_sqrt_ps (__mmask8 __U, __m128 __A) {
return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
(__v4sf)
_mm_setzero_ps (),
(__mmask8) __U);
_mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) {
return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
(__v4sf)_mm_sqrt_ps(__A),
(__v4sf)_mm_setzero_pd());
}
static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_mask_sqrt_ps (__m256 __W, __mmask8 __U, __m256 __A) {
return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
(__v8sf) __W,
(__mmask8) __U);
_mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) {
return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
(__v8sf)_mm256_sqrt_ps(__A),
(__v8sf)__W);
}
static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_maskz_sqrt_ps (__mmask8 __U, __m256 __A) {
return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
(__v8sf)
_mm256_setzero_ps (),
(__mmask8) __U);
_mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) {
return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
(__v8sf)_mm256_sqrt_ps(__A),
(__v8sf)_mm256_setzero_ps());
}
static __inline__ __m128d __DEFAULT_FN_ATTRS

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@ -3095,42 +3095,50 @@ void test_mm256_mask_i32scatter_epi32(int *__addr, __mmask8 __mask, __m256i __i
}
__m128d test_mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) {
// CHECK-LABEL: @test_mm_mask_sqrt_pd
// CHECK: @llvm.x86.avx512.mask.sqrt.pd.128
// CHECK: @llvm.x86.sse2.sqrt.pd
// CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
return _mm_mask_sqrt_pd(__W,__U,__A);
}
__m128d test_mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) {
// CHECK-LABEL: @test_mm_maskz_sqrt_pd
// CHECK: @llvm.x86.avx512.mask.sqrt.pd.128
// CHECK: @llvm.x86.sse2.sqrt.pd
// CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
return _mm_maskz_sqrt_pd(__U,__A);
}
__m256d test_mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) {
// CHECK-LABEL: @test_mm256_mask_sqrt_pd
// CHECK: @llvm.x86.avx512.mask.sqrt.pd.256
// CHECK: @llvm.x86.avx.sqrt.pd.256
// CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
return _mm256_mask_sqrt_pd(__W,__U,__A);
}
__m256d test_mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) {
// CHECK-LABEL: @test_mm256_maskz_sqrt_pd
// CHECK: @llvm.x86.avx512.mask.sqrt.pd.256
// CHECK: @llvm.x86.avx.sqrt.pd.256
// CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
return _mm256_maskz_sqrt_pd(__U,__A);
}
__m128 test_mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) {
// CHECK-LABEL: @test_mm_mask_sqrt_ps
// CHECK: @llvm.x86.avx512.mask.sqrt.ps.128
// CHECK: @llvm.x86.sse.sqrt.ps
// CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
return _mm_mask_sqrt_ps(__W,__U,__A);
}
__m128 test_mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) {
// CHECK-LABEL: @test_mm_maskz_sqrt_ps
// CHECK: @llvm.x86.avx512.mask.sqrt.ps.128
// CHECK: @llvm.x86.sse.sqrt.ps
// CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
return _mm_maskz_sqrt_ps(__U,__A);
}
__m256 test_mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) {
// CHECK-LABEL: @test_mm256_mask_sqrt_ps
// CHECK: @llvm.x86.avx512.mask.sqrt.ps.256
// CHECK: @llvm.x86.avx.sqrt.ps.256
// CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
return _mm256_mask_sqrt_ps(__W,__U,__A);
}
__m256 test_mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) {
// CHECK-LABEL: @test_mm256_maskz_sqrt_ps
// CHECK: @llvm.x86.avx512.mask.sqrt.ps.256
// CHECK: @llvm.x86.avx.sqrt.ps.256
// CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
return _mm256_maskz_sqrt_ps(__U,__A);
}
__m128d test_mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {