forked from OSchip/llvm-project
[AVX-512] Remove masked 128/256-bit sqrt builtins and replace them with unmasked builtins and a select.
llvm-svn: 285504
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09e94007be
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2eadf1b67e
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@ -1251,10 +1251,6 @@ TARGET_BUILTIN(__builtin_ia32_scattersiv4si, "vi*UcV4iV4iIi", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_scattersiv8sf, "vf*UcV8iV8fIi", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_scattersiv8si, "vi*UcV8iV8iIi", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_sqrtpd128_mask, "V2dV2dV2dUc", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_sqrtpd256_mask, "V4dV4dV4dUc", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_sqrtps128_mask, "V4fV4fV4fUc", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_sqrtps256_mask, "V8fV8fV8fUc", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_vpermi2vard128_mask, "V4iV4iV4iV4iUc", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_vpermi2vard256_mask, "V8iV8iV8iV8iUc", "", "avx512vl")
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TARGET_BUILTIN(__builtin_ia32_vpermi2varpd128_mask, "V2dV2dV2LLiV2dUc", "", "avx512vl")
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@ -3955,63 +3955,59 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
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(__v8si)(__m256i)(v1), (int)(scale)); })
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_mask_sqrt_pd (__m128d __W, __mmask8 __U, __m128d __A) {
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return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
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(__v2df) __W,
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(__mmask8) __U);
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_mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) {
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return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
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(__v2df)_mm_sqrt_pd(__A),
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(__v2df)__W);
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}
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_maskz_sqrt_pd (__mmask8 __U, __m128d __A) {
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return (__m128d) __builtin_ia32_sqrtpd128_mask ((__v2df) __A,
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(__v2df)
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_mm_setzero_pd (),
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(__mmask8) __U);
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_mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) {
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return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
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(__v2df)_mm_sqrt_pd(__A),
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(__v2df)_mm_setzero_pd());
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}
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static __inline__ __m256d __DEFAULT_FN_ATTRS
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_mm256_mask_sqrt_pd (__m256d __W, __mmask8 __U, __m256d __A) {
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return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
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(__v4df) __W,
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(__mmask8) __U);
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_mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) {
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return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
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(__v4df)_mm256_sqrt_pd(__A),
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(__v4df)__W);
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}
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static __inline__ __m256d __DEFAULT_FN_ATTRS
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_mm256_maskz_sqrt_pd (__mmask8 __U, __m256d __A) {
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return (__m256d) __builtin_ia32_sqrtpd256_mask ((__v4df) __A,
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(__v4df)
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_mm256_setzero_pd (),
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(__mmask8) __U);
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_mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) {
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return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
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(__v4df)_mm256_sqrt_pd(__A),
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(__v4df)_mm256_setzero_pd());
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}
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_mask_sqrt_ps (__m128 __W, __mmask8 __U, __m128 __A) {
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return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
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(__v4sf) __W,
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(__mmask8) __U);
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_mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) {
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return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
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(__v4sf)_mm_sqrt_ps(__A),
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(__v4sf)__W);
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}
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_maskz_sqrt_ps (__mmask8 __U, __m128 __A) {
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return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
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(__v4sf)
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_mm_setzero_ps (),
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(__mmask8) __U);
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_mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) {
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return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
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(__v4sf)_mm_sqrt_ps(__A),
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(__v4sf)_mm_setzero_pd());
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}
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static __inline__ __m256 __DEFAULT_FN_ATTRS
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_mm256_mask_sqrt_ps (__m256 __W, __mmask8 __U, __m256 __A) {
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return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
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(__v8sf) __W,
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(__mmask8) __U);
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_mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) {
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return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
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(__v8sf)_mm256_sqrt_ps(__A),
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(__v8sf)__W);
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}
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static __inline__ __m256 __DEFAULT_FN_ATTRS
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_mm256_maskz_sqrt_ps (__mmask8 __U, __m256 __A) {
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return (__m256) __builtin_ia32_sqrtps256_mask ((__v8sf) __A,
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(__v8sf)
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_mm256_setzero_ps (),
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(__mmask8) __U);
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_mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) {
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return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
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(__v8sf)_mm256_sqrt_ps(__A),
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(__v8sf)_mm256_setzero_ps());
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}
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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@ -3095,42 +3095,50 @@ void test_mm256_mask_i32scatter_epi32(int *__addr, __mmask8 __mask, __m256i __i
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}
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__m128d test_mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) {
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// CHECK-LABEL: @test_mm_mask_sqrt_pd
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// CHECK: @llvm.x86.avx512.mask.sqrt.pd.128
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// CHECK: @llvm.x86.sse2.sqrt.pd
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// CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
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return _mm_mask_sqrt_pd(__W,__U,__A);
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}
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__m128d test_mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) {
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// CHECK-LABEL: @test_mm_maskz_sqrt_pd
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// CHECK: @llvm.x86.avx512.mask.sqrt.pd.128
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// CHECK: @llvm.x86.sse2.sqrt.pd
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// CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
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return _mm_maskz_sqrt_pd(__U,__A);
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}
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__m256d test_mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) {
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// CHECK-LABEL: @test_mm256_mask_sqrt_pd
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// CHECK: @llvm.x86.avx512.mask.sqrt.pd.256
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// CHECK: @llvm.x86.avx.sqrt.pd.256
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// CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
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return _mm256_mask_sqrt_pd(__W,__U,__A);
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}
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__m256d test_mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) {
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// CHECK-LABEL: @test_mm256_maskz_sqrt_pd
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// CHECK: @llvm.x86.avx512.mask.sqrt.pd.256
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// CHECK: @llvm.x86.avx.sqrt.pd.256
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// CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
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return _mm256_maskz_sqrt_pd(__U,__A);
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}
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__m128 test_mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) {
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// CHECK-LABEL: @test_mm_mask_sqrt_ps
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// CHECK: @llvm.x86.avx512.mask.sqrt.ps.128
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// CHECK: @llvm.x86.sse.sqrt.ps
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// CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
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return _mm_mask_sqrt_ps(__W,__U,__A);
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}
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__m128 test_mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) {
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// CHECK-LABEL: @test_mm_maskz_sqrt_ps
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// CHECK: @llvm.x86.avx512.mask.sqrt.ps.128
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// CHECK: @llvm.x86.sse.sqrt.ps
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// CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
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return _mm_maskz_sqrt_ps(__U,__A);
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}
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__m256 test_mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) {
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// CHECK-LABEL: @test_mm256_mask_sqrt_ps
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// CHECK: @llvm.x86.avx512.mask.sqrt.ps.256
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// CHECK: @llvm.x86.avx.sqrt.ps.256
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// CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
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return _mm256_mask_sqrt_ps(__W,__U,__A);
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}
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__m256 test_mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) {
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// CHECK-LABEL: @test_mm256_maskz_sqrt_ps
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// CHECK: @llvm.x86.avx512.mask.sqrt.ps.256
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// CHECK: @llvm.x86.avx.sqrt.ps.256
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// CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
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return _mm256_maskz_sqrt_ps(__U,__A);
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}
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__m128d test_mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
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