forked from OSchip/llvm-project
The enabling of remat in 2-address conversion breaks this test:
Running /Users/void/llvm/llvm.src/test/CodeGen/X86/dg.exp ... FAIL: /Users/void/llvm/llvm.src/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll Failed with exit(1) at line 1 while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll | llc -march=x86 -mattr=+sse2 -stats |& grep {1 .*folded into instructions} child process exited abnormally Make this conditional for now. llvm-svn: 51563
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@ -37,6 +37,7 @@
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/SmallPtrSet.h"
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@ -49,6 +50,10 @@ STATISTIC(NumCommuted , "Number of instructions commuted to coalesce");
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STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
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STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk");
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static cl::opt<bool>
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EnableReMat("2-addr-remat", cl::init(false), cl::Hidden,
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cl::desc("Two-addr conversion should remat when possible."));
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namespace {
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class VISIBILITY_HIDDEN TwoAddressInstructionPass
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: public MachineFunctionPass {
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@ -326,7 +331,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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const TargetRegisterClass* rc = MF.getRegInfo().getRegClass(regA);
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MachineInstr *Orig = MRI->getVRegDef(regB);
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if (Orig && TII->isTriviallyReMaterializable(Orig)) {
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if (EnableReMat && Orig && TII->isTriviallyReMaterializable(Orig)) {
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TII->reMaterialize(*mbbi, mi, regA, Orig);
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ReMattedInstrs.insert(Orig);
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} else {
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@ -367,33 +372,35 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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}
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}
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SmallPtrSet<MachineInstr*, 8>::iterator I = ReMattedInstrs.begin();
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SmallPtrSet<MachineInstr*, 8>::iterator E = ReMattedInstrs.end();
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if (EnableReMat) {
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SmallPtrSet<MachineInstr*, 8>::iterator I = ReMattedInstrs.begin();
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SmallPtrSet<MachineInstr*, 8>::iterator E = ReMattedInstrs.end();
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for (; I != E; ++I) {
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MachineInstr *MI = *I;
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bool InstrDead = true;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegister())
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continue;
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unsigned MOReg = MO.getReg();
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if (!MOReg)
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continue;
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if (MO.isDef()) {
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if (MO.isImplicit())
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for (; I != E; ++I) {
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MachineInstr *MI = *I;
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bool InstrDead = true;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegister())
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continue;
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unsigned MOReg = MO.getReg();
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if (!MOReg)
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continue;
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if (MO.isDef()) {
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if (MO.isImplicit())
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continue;
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if (MRI->use_begin(MOReg) != MRI->use_end()) {
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InstrDead = false;
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break;
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if (MRI->use_begin(MOReg) != MRI->use_end()) {
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InstrDead = false;
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break;
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}
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}
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}
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}
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if (InstrDead && MI->getNumOperands() > 0)
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MI->eraseFromParent();
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if (InstrDead && MI->getNumOperands() > 0)
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MI->eraseFromParent();
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}
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}
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return MadeChange;
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