forked from OSchip/llvm-project
Use target flags for printing SPARC asm operands.
64-bit code models need multiple relocations that can't be inferred from the opcode like they can in 32-bit code. llvm-svn: 179472
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@ -16,6 +16,7 @@
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#include "Sparc.h"
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#include "Sparc.h"
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#include "SparcInstrInfo.h"
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#include "SparcInstrInfo.h"
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#include "SparcTargetMachine.h"
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#include "SparcTargetMachine.h"
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#include "MCTargetDesc/SparcBaseInfo.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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@ -72,15 +73,39 @@ namespace {
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void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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raw_ostream &O) {
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand (opNum);
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const MachineOperand &MO = MI->getOperand (opNum);
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bool CloseParen = false;
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unsigned TF = MO.getTargetFlags();
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if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
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#ifndef NDEBUG
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O << "%hi(";
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// Verify the target flags.
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CloseParen = true;
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if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
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} else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
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if (MI->getOpcode() == SP::CALL)
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!MO.isReg() && !MO.isImm()) {
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assert(TF == SPII::MO_NO_FLAG &&
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O << "%lo(";
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"Cannot handle target flags on call address");
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CloseParen = true;
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else if (MI->getOpcode() == SP::SETHIi)
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assert((TF == SPII::MO_HI || TF == SPII::MO_H44 || TF == SPII::MO_HH) &&
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"Invalid target flags for address operand on sethi");
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else
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assert((TF == SPII::MO_LO || TF == SPII::MO_M44 || TF == SPII::MO_L44 ||
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TF == SPII::MO_HM) &&
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"Invalid target flags for small address operand");
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}
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}
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#endif
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bool CloseParen = true;
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switch (TF) {
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default:
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llvm_unreachable("Unknown target flags on operand");
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case SPII::MO_NO_FLAG:
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CloseParen = false;
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break;
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case SPII::MO_LO: O << "%lo("; break;
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case SPII::MO_HI: O << "%hi("; break;
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case SPII::MO_H44: O << "%h44("; break;
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case SPII::MO_M44: O << "%m44("; break;
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case SPII::MO_L44: O << "%l44("; break;
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case SPII::MO_HH: O << "%hh("; break;
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case SPII::MO_HM: O << "%hm("; break;
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}
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switch (MO.getType()) {
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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case MachineOperand::MO_Register:
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O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
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O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
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@ -127,14 +152,7 @@ void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
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return; // don't print "+0"
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return; // don't print "+0"
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O << "+";
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O << "+";
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if (MI->getOperand(opNum+1).isGlobal() ||
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printOperand(MI, opNum+1, O);
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MI->getOperand(opNum+1).isCPI()) {
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O << "%lo(";
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printOperand(MI, opNum+1, O);
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O << ")";
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} else {
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printOperand(MI, opNum+1, O);
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}
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}
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}
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bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
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bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
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