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[Mem2Reg] Modernize code a bit. 

No functionality change intended.

llvm-svn: 311290
This commit is contained in:
Benjamin Kramer 2017-08-20 14:34:44 +00:00
parent 9a5a278f78
commit 2e5be849cc
1 changed files with 11 additions and 23 deletions
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34
llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
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@ -156,18 +156,11 @@ class RenamePassData {
public: public:
typedef std::vector<Value *> ValVector; typedef std::vector<Value *> ValVector;
RenamePassData() : BB(nullptr), Pred(nullptr), Values() {} RenamePassData(BasicBlock *B, BasicBlock *P, ValVector V)
RenamePassData(BasicBlock *B, BasicBlock *P, const ValVector &V) : BB(B), Pred(P), Values(std::move(V)) {}
: BB(B), Pred(P), Values(V) {}
BasicBlock *BB; BasicBlock *BB;
BasicBlock *Pred; BasicBlock *Pred;
ValVector Values; ValVector Values;
void swap(RenamePassData &RHS) {
std::swap(BB, RHS.BB);
std::swap(Pred, RHS.Pred);
Values.swap(RHS.Values);
}
}; };
/// \brief This assigns and keeps a per-bb relative ordering of load/store /// \brief This assigns and keeps a per-bb relative ordering of load/store
@ -629,8 +622,8 @@ void PromoteMem2Reg::run() {
}); });
unsigned CurrentVersion = 0; unsigned CurrentVersion = 0;
for (unsigned i = 0, e = PHIBlocks.size(); i != e; ++i) for (BasicBlock *BB : PHIBlocks)
QueuePhiNode(PHIBlocks[i], AllocaNum, CurrentVersion); QueuePhiNode(BB, AllocaNum, CurrentVersion);
} }
if (Allocas.empty()) if (Allocas.empty())
@ -652,8 +645,7 @@ void PromoteMem2Reg::run() {
std::vector<RenamePassData> RenamePassWorkList; std::vector<RenamePassData> RenamePassWorkList;
RenamePassWorkList.emplace_back(&F.front(), nullptr, std::move(Values)); RenamePassWorkList.emplace_back(&F.front(), nullptr, std::move(Values));
do { do {
RenamePassData RPD; RenamePassData RPD = std::move(RenamePassWorkList.back());
RPD.swap(RenamePassWorkList.back());
RenamePassWorkList.pop_back(); RenamePassWorkList.pop_back();
// RenamePass may add new worklist entries. // RenamePass may add new worklist entries.
RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList); RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList);
@ -663,9 +655,7 @@ void PromoteMem2Reg::run() {
Visited.clear(); Visited.clear();
// Remove the allocas themselves from the function. // Remove the allocas themselves from the function.
for (unsigned i = 0, e = Allocas.size(); i != e; ++i) { for (Instruction *A : Allocas) {
Instruction *A = Allocas[i];
// If there are any uses of the alloca instructions left, they must be in // If there are any uses of the alloca instructions left, they must be in
// unreachable basic blocks that were not processed by walking the dominator // unreachable basic blocks that were not processed by walking the dominator
// tree. Just delete the users now. // tree. Just delete the users now.
@ -675,8 +665,8 @@ void PromoteMem2Reg::run() {
} }
// Remove alloca's dbg.declare instrinsics from the function. // Remove alloca's dbg.declare instrinsics from the function.
for (unsigned i = 0, e = AllocaDbgDeclares.size(); i != e; ++i) for (DbgDeclareInst *DDI : AllocaDbgDeclares)
if (DbgDeclareInst *DDI = AllocaDbgDeclares[i]) if (DDI)
DDI->eraseFromParent(); DDI->eraseFromParent();
// Loop over all of the PHI nodes and see if there are any that we can get // Loop over all of the PHI nodes and see if there are any that we can get
@ -762,8 +752,8 @@ void PromoteMem2Reg::run() {
while ((SomePHI = dyn_cast<PHINode>(BBI++)) && while ((SomePHI = dyn_cast<PHINode>(BBI++)) &&
SomePHI->getNumIncomingValues() == NumBadPreds) { SomePHI->getNumIncomingValues() == NumBadPreds) {
Value *UndefVal = UndefValue::get(SomePHI->getType()); Value *UndefVal = UndefValue::get(SomePHI->getType());
for (unsigned pred = 0, e = Preds.size(); pred != e; ++pred) for (BasicBlock *Pred : Preds)
SomePHI->addIncoming(UndefVal, Preds[pred]); SomePHI->addIncoming(UndefVal, Pred);
} }
} }
@ -834,9 +824,7 @@ void PromoteMem2Reg::ComputeLiveInBlocks(
// Since the value is live into BB, it is either defined in a predecessor or // Since the value is live into BB, it is either defined in a predecessor or
// live into it to. Add the preds to the worklist unless they are a // live into it to. Add the preds to the worklist unless they are a
// defining block. // defining block.
for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { for (BasicBlock *P : predecessors(BB)) {
BasicBlock *P = *PI;
// The value is not live into a predecessor if it defines the value. // The value is not live into a predecessor if it defines the value.
if (DefBlocks.count(P)) if (DefBlocks.count(P))
continue; continue;