forked from OSchip/llvm-project
[Mem2Reg] Modernize code a bit.
No functionality change intended. llvm-svn: 311290
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@ -156,18 +156,11 @@ class RenamePassData {
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public:
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typedef std::vector<Value *> ValVector;
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RenamePassData() : BB(nullptr), Pred(nullptr), Values() {}
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RenamePassData(BasicBlock *B, BasicBlock *P, const ValVector &V)
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: BB(B), Pred(P), Values(V) {}
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RenamePassData(BasicBlock *B, BasicBlock *P, ValVector V)
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: BB(B), Pred(P), Values(std::move(V)) {}
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BasicBlock *BB;
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BasicBlock *Pred;
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ValVector Values;
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void swap(RenamePassData &RHS) {
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std::swap(BB, RHS.BB);
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std::swap(Pred, RHS.Pred);
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Values.swap(RHS.Values);
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}
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};
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/// \brief This assigns and keeps a per-bb relative ordering of load/store
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@ -629,8 +622,8 @@ void PromoteMem2Reg::run() {
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});
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unsigned CurrentVersion = 0;
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for (unsigned i = 0, e = PHIBlocks.size(); i != e; ++i)
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QueuePhiNode(PHIBlocks[i], AllocaNum, CurrentVersion);
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for (BasicBlock *BB : PHIBlocks)
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QueuePhiNode(BB, AllocaNum, CurrentVersion);
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}
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if (Allocas.empty())
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@ -652,8 +645,7 @@ void PromoteMem2Reg::run() {
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std::vector<RenamePassData> RenamePassWorkList;
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RenamePassWorkList.emplace_back(&F.front(), nullptr, std::move(Values));
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do {
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RenamePassData RPD;
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RPD.swap(RenamePassWorkList.back());
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RenamePassData RPD = std::move(RenamePassWorkList.back());
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RenamePassWorkList.pop_back();
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// RenamePass may add new worklist entries.
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RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList);
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@ -663,9 +655,7 @@ void PromoteMem2Reg::run() {
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Visited.clear();
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// Remove the allocas themselves from the function.
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for (unsigned i = 0, e = Allocas.size(); i != e; ++i) {
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Instruction *A = Allocas[i];
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for (Instruction *A : Allocas) {
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// If there are any uses of the alloca instructions left, they must be in
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// unreachable basic blocks that were not processed by walking the dominator
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// tree. Just delete the users now.
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@ -675,8 +665,8 @@ void PromoteMem2Reg::run() {
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}
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// Remove alloca's dbg.declare instrinsics from the function.
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for (unsigned i = 0, e = AllocaDbgDeclares.size(); i != e; ++i)
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if (DbgDeclareInst *DDI = AllocaDbgDeclares[i])
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for (DbgDeclareInst *DDI : AllocaDbgDeclares)
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if (DDI)
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DDI->eraseFromParent();
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// Loop over all of the PHI nodes and see if there are any that we can get
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@ -762,8 +752,8 @@ void PromoteMem2Reg::run() {
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while ((SomePHI = dyn_cast<PHINode>(BBI++)) &&
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SomePHI->getNumIncomingValues() == NumBadPreds) {
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Value *UndefVal = UndefValue::get(SomePHI->getType());
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for (unsigned pred = 0, e = Preds.size(); pred != e; ++pred)
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SomePHI->addIncoming(UndefVal, Preds[pred]);
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for (BasicBlock *Pred : Preds)
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SomePHI->addIncoming(UndefVal, Pred);
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}
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}
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@ -834,9 +824,7 @@ void PromoteMem2Reg::ComputeLiveInBlocks(
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// Since the value is live into BB, it is either defined in a predecessor or
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// live into it to. Add the preds to the worklist unless they are a
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// defining block.
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for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
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BasicBlock *P = *PI;
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for (BasicBlock *P : predecessors(BB)) {
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// The value is not live into a predecessor if it defines the value.
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if (DefBlocks.count(P))
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continue;
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