forked from OSchip/llvm-project
[NFC][Codegen] D62818 - also add tests with X being constant
For X86, these may be a 'BT' pattern, and in general, can cause the transform to deadlock. llvm-svn: 362494
This commit is contained in:
Roman Lebedev
parent
49d7221f71
commit
2e49e8196d
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@ -301,6 +301,40 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; What if X is a constant too?
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;------------------------------------------------------------------------------;
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define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
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; CHECK-LABEL: scalar_i32_x_is_const_eq:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #43605
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; CHECK-NEXT: movk w8, #43605, lsl #16
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; CHECK-NEXT: lsr w8, w8, w0
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; CHECK-NEXT: tst w8, #0x1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%t0 = lshr i32 2857740885, %y
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%t1 = and i32 %t0, 1
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
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; CHECK-LABEL: scalar_i32_x_is_const2_eq:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: mov w9, #43605
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; CHECK-NEXT: lsr w8, w8, w0
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; CHECK-NEXT: movk w9, #43605, lsl #16
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; CHECK-NEXT: tst w8, w9
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%t0 = lshr i32 1, %y
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%t1 = and i32 %t0, 2857740885
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; A few negative tests
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;------------------------------------------------------------------------------;
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@ -296,6 +296,40 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; What if X is a constant too?
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;------------------------------------------------------------------------------;
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define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
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; CHECK-LABEL: scalar_i32_x_is_const_eq:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #43605
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; CHECK-NEXT: movk w8, #43605, lsl #16
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; CHECK-NEXT: lsl w8, w8, w0
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; CHECK-NEXT: tst w8, #0x1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%t0 = shl i32 2857740885, %y
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%t1 = and i32 %t0, 1
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
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; CHECK-LABEL: scalar_i32_x_is_const2_eq:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #1
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; CHECK-NEXT: mov w9, #43605
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; CHECK-NEXT: lsl w8, w8, w0
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; CHECK-NEXT: movk w9, #43605, lsl #16
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; CHECK-NEXT: tst w8, w9
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%t0 = shl i32 1, %y
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%t1 = and i32 %t0, 2857740885
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; A few negative tests
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;------------------------------------------------------------------------------;
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@ -1119,6 +1119,111 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; What if X is a constant too?
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;------------------------------------------------------------------------------;
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define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
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; ARM6-LABEL: scalar_i32_x_is_const_eq:
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; ARM6: @ %bb.0:
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; ARM6-NEXT: ldr r1, .LCPI18_0
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; ARM6-NEXT: mov r2, #1
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; ARM6-NEXT: bic r0, r2, r1, lsr r0
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; ARM6-NEXT: bx lr
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; ARM6-NEXT: .p2align 2
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; ARM6-NEXT: @ %bb.1:
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; ARM6-NEXT: .LCPI18_0:
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; ARM6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; ARM78-LABEL: scalar_i32_x_is_const_eq:
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; ARM78: @ %bb.0:
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; ARM78-NEXT: movw r1, #43605
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; ARM78-NEXT: mov r2, #1
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; ARM78-NEXT: movt r1, #43605
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; ARM78-NEXT: bic r0, r2, r1, lsr r0
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; ARM78-NEXT: bx lr
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;
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; THUMB6-LABEL: scalar_i32_x_is_const_eq:
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; THUMB6: @ %bb.0:
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; THUMB6-NEXT: ldr r1, .LCPI18_0
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; THUMB6-NEXT: lsrs r1, r0
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; THUMB6-NEXT: movs r2, #1
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; THUMB6-NEXT: ands r2, r1
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; THUMB6-NEXT: rsbs r0, r2, #0
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; THUMB6-NEXT: adcs r0, r2
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; THUMB6-NEXT: bx lr
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; THUMB6-NEXT: .p2align 2
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; THUMB6-NEXT: @ %bb.1:
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; THUMB6-NEXT: .LCPI18_0:
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; THUMB6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; THUMB78-LABEL: scalar_i32_x_is_const_eq:
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; THUMB78: @ %bb.0:
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; THUMB78-NEXT: movw r1, #43605
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; THUMB78-NEXT: movt r1, #43605
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; THUMB78-NEXT: lsr.w r0, r1, r0
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; THUMB78-NEXT: movs r1, #1
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; THUMB78-NEXT: bic.w r0, r1, r0
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; THUMB78-NEXT: bx lr
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%t0 = lshr i32 2857740885, %y
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%t1 = and i32 %t0, 1
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
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; ARM6-LABEL: scalar_i32_x_is_const2_eq:
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; ARM6: @ %bb.0:
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; ARM6-NEXT: ldr r2, .LCPI19_0
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; ARM6-NEXT: mov r1, #1
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; ARM6-NEXT: and r0, r2, r1, lsr r0
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; ARM6-NEXT: clz r0, r0
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; ARM6-NEXT: lsr r0, r0, #5
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; ARM6-NEXT: bx lr
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; ARM6-NEXT: .p2align 2
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; ARM6-NEXT: @ %bb.1:
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; ARM6-NEXT: .LCPI19_0:
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; ARM6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; ARM78-LABEL: scalar_i32_x_is_const2_eq:
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; ARM78: @ %bb.0:
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; ARM78-NEXT: movw r1, #43605
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; ARM78-NEXT: mov r2, #1
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; ARM78-NEXT: movt r1, #43605
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; ARM78-NEXT: and r0, r1, r2, lsr r0
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; ARM78-NEXT: clz r0, r0
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; ARM78-NEXT: lsr r0, r0, #5
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; ARM78-NEXT: bx lr
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;
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; THUMB6-LABEL: scalar_i32_x_is_const2_eq:
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; THUMB6: @ %bb.0:
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; THUMB6-NEXT: movs r1, #1
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; THUMB6-NEXT: lsrs r1, r0
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; THUMB6-NEXT: ldr r2, .LCPI19_0
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; THUMB6-NEXT: ands r2, r1
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; THUMB6-NEXT: rsbs r0, r2, #0
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; THUMB6-NEXT: adcs r0, r2
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; THUMB6-NEXT: bx lr
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; THUMB6-NEXT: .p2align 2
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; THUMB6-NEXT: @ %bb.1:
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; THUMB6-NEXT: .LCPI19_0:
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; THUMB6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; THUMB78-LABEL: scalar_i32_x_is_const2_eq:
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; THUMB78: @ %bb.0:
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; THUMB78-NEXT: movs r1, #1
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; THUMB78-NEXT: lsr.w r0, r1, r0
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; THUMB78-NEXT: movw r1, #43605
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; THUMB78-NEXT: movt r1, #43605
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; THUMB78-NEXT: ands r0, r1
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; THUMB78-NEXT: clz r0, r0
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; THUMB78-NEXT: lsrs r0, r0, #5
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; THUMB78-NEXT: bx lr
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%t0 = lshr i32 1, %y
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%t1 = and i32 %t0, 2857740885
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; A few negative tests
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;------------------------------------------------------------------------------;
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@ -1154,11 +1259,11 @@ define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
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; THUMB6-NEXT: ands r2, r0
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; THUMB6-NEXT: sxtb r0, r2
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; THUMB6-NEXT: cmp r0, #0
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; THUMB6-NEXT: blt .LBB18_2
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; THUMB6-NEXT: blt .LBB20_2
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; THUMB6-NEXT: @ %bb.1:
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; THUMB6-NEXT: movs r0, #0
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; THUMB6-NEXT: bx lr
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; THUMB6-NEXT: .LBB18_2:
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; THUMB6-NEXT: .LBB20_2:
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; THUMB6-NEXT: movs r0, #1
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; THUMB6-NEXT: bx lr
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;
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@ -1130,6 +1130,111 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; What if X is a constant too?
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;------------------------------------------------------------------------------;
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define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
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; ARM6-LABEL: scalar_i32_x_is_const_eq:
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; ARM6: @ %bb.0:
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; ARM6-NEXT: ldr r1, .LCPI18_0
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; ARM6-NEXT: mov r2, #1
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; ARM6-NEXT: bic r0, r2, r1, lsl r0
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; ARM6-NEXT: bx lr
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; ARM6-NEXT: .p2align 2
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; ARM6-NEXT: @ %bb.1:
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; ARM6-NEXT: .LCPI18_0:
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; ARM6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; ARM78-LABEL: scalar_i32_x_is_const_eq:
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; ARM78: @ %bb.0:
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; ARM78-NEXT: movw r1, #43605
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; ARM78-NEXT: mov r2, #1
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; ARM78-NEXT: movt r1, #43605
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; ARM78-NEXT: bic r0, r2, r1, lsl r0
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; ARM78-NEXT: bx lr
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;
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; THUMB6-LABEL: scalar_i32_x_is_const_eq:
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; THUMB6: @ %bb.0:
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; THUMB6-NEXT: ldr r1, .LCPI18_0
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; THUMB6-NEXT: lsls r1, r0
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; THUMB6-NEXT: movs r2, #1
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; THUMB6-NEXT: ands r2, r1
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; THUMB6-NEXT: rsbs r0, r2, #0
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; THUMB6-NEXT: adcs r0, r2
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; THUMB6-NEXT: bx lr
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; THUMB6-NEXT: .p2align 2
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; THUMB6-NEXT: @ %bb.1:
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; THUMB6-NEXT: .LCPI18_0:
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; THUMB6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; THUMB78-LABEL: scalar_i32_x_is_const_eq:
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; THUMB78: @ %bb.0:
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; THUMB78-NEXT: movw r1, #43605
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; THUMB78-NEXT: movt r1, #43605
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; THUMB78-NEXT: lsl.w r0, r1, r0
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; THUMB78-NEXT: movs r1, #1
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; THUMB78-NEXT: bic.w r0, r1, r0
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; THUMB78-NEXT: bx lr
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%t0 = shl i32 2857740885, %y
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%t1 = and i32 %t0, 1
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
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; ARM6-LABEL: scalar_i32_x_is_const2_eq:
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; ARM6: @ %bb.0:
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; ARM6-NEXT: ldr r2, .LCPI19_0
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; ARM6-NEXT: mov r1, #1
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; ARM6-NEXT: and r0, r2, r1, lsl r0
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; ARM6-NEXT: clz r0, r0
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; ARM6-NEXT: lsr r0, r0, #5
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; ARM6-NEXT: bx lr
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; ARM6-NEXT: .p2align 2
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; ARM6-NEXT: @ %bb.1:
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; ARM6-NEXT: .LCPI19_0:
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; ARM6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; ARM78-LABEL: scalar_i32_x_is_const2_eq:
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; ARM78: @ %bb.0:
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; ARM78-NEXT: movw r1, #43605
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; ARM78-NEXT: mov r2, #1
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; ARM78-NEXT: movt r1, #43605
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; ARM78-NEXT: and r0, r1, r2, lsl r0
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; ARM78-NEXT: clz r0, r0
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; ARM78-NEXT: lsr r0, r0, #5
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; ARM78-NEXT: bx lr
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;
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; THUMB6-LABEL: scalar_i32_x_is_const2_eq:
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; THUMB6: @ %bb.0:
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; THUMB6-NEXT: movs r1, #1
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; THUMB6-NEXT: lsls r1, r0
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; THUMB6-NEXT: ldr r2, .LCPI19_0
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; THUMB6-NEXT: ands r2, r1
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; THUMB6-NEXT: rsbs r0, r2, #0
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; THUMB6-NEXT: adcs r0, r2
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; THUMB6-NEXT: bx lr
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; THUMB6-NEXT: .p2align 2
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; THUMB6-NEXT: @ %bb.1:
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; THUMB6-NEXT: .LCPI19_0:
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; THUMB6-NEXT: .long 2857740885 @ 0xaa55aa55
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;
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; THUMB78-LABEL: scalar_i32_x_is_const2_eq:
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; THUMB78: @ %bb.0:
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; THUMB78-NEXT: movs r1, #1
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; THUMB78-NEXT: lsl.w r0, r1, r0
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; THUMB78-NEXT: movw r1, #43605
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; THUMB78-NEXT: movt r1, #43605
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; THUMB78-NEXT: ands r0, r1
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; THUMB78-NEXT: clz r0, r0
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; THUMB78-NEXT: lsrs r0, r0, #5
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; THUMB78-NEXT: bx lr
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%t0 = shl i32 1, %y
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%t1 = and i32 %t0, 2857740885
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; A few negative tests
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;------------------------------------------------------------------------------;
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@ -1165,11 +1270,11 @@ define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
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; THUMB6-NEXT: ands r2, r0
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; THUMB6-NEXT: sxtb r0, r2
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; THUMB6-NEXT: cmp r0, #0
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; THUMB6-NEXT: blt .LBB18_2
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; THUMB6-NEXT: blt .LBB20_2
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; THUMB6-NEXT: @ %bb.1:
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; THUMB6-NEXT: movs r0, #0
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; THUMB6-NEXT: bx lr
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; THUMB6-NEXT: .LBB18_2:
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; THUMB6-NEXT: .LBB20_2:
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; THUMB6-NEXT: movs r0, #1
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; THUMB6-NEXT: bx lr
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;
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@ -869,6 +869,91 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
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ret i1 %res
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}
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;------------------------------------------------------------------------------;
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; What if X is a constant too?
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;------------------------------------------------------------------------------;
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define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
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; X86-LABEL: scalar_i32_x_is_const_eq:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
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; X86-NEXT: btl %eax, %ecx
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; X86-NEXT: setae %al
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; X86-NEXT: retl
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;
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; X64-LABEL: scalar_i32_x_is_const_eq:
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; X64: # %bb.0:
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; X64-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
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; X64-NEXT: btl %edi, %eax
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; X64-NEXT: setae %al
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; X64-NEXT: retq
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%t0 = lshr i32 2857740885, %y
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%t1 = and i32 %t0, 1
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%res = icmp eq i32 %t1, 0
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ret i1 %res
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}
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define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
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; X86-NOBMI-LABEL: scalar_i32_x_is_const2_eq:
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; X86-NOBMI: # %bb.0:
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; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NOBMI-NEXT: movl $1, %eax
|
||||
; X86-NOBMI-NEXT: shrl %cl, %eax
|
||||
; X86-NOBMI-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X86-NOBMI-NEXT: sete %al
|
||||
; X86-NOBMI-NEXT: retl
|
||||
;
|
||||
; X86-BMI1-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X86-BMI1: # %bb.0:
|
||||
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-BMI1-NEXT: movl $1, %eax
|
||||
; X86-BMI1-NEXT: shrl %cl, %eax
|
||||
; X86-BMI1-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X86-BMI1-NEXT: sete %al
|
||||
; X86-BMI1-NEXT: retl
|
||||
;
|
||||
; X86-BMI12-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X86-BMI12: # %bb.0:
|
||||
; X86-BMI12-NEXT: movb {{[0-9]+}}(%esp), %al
|
||||
; X86-BMI12-NEXT: movl $1, %ecx
|
||||
; X86-BMI12-NEXT: shrxl %eax, %ecx, %eax
|
||||
; X86-BMI12-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X86-BMI12-NEXT: sete %al
|
||||
; X86-BMI12-NEXT: retl
|
||||
;
|
||||
; X64-NOBMI-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X64-NOBMI: # %bb.0:
|
||||
; X64-NOBMI-NEXT: movl %edi, %ecx
|
||||
; X64-NOBMI-NEXT: movl $1, %eax
|
||||
; X64-NOBMI-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-NOBMI-NEXT: shrl %cl, %eax
|
||||
; X64-NOBMI-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-NOBMI-NEXT: sete %al
|
||||
; X64-NOBMI-NEXT: retq
|
||||
;
|
||||
; X64-BMI1-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X64-BMI1: # %bb.0:
|
||||
; X64-BMI1-NEXT: movl %edi, %ecx
|
||||
; X64-BMI1-NEXT: movl $1, %eax
|
||||
; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-BMI1-NEXT: shrl %cl, %eax
|
||||
; X64-BMI1-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-BMI1-NEXT: sete %al
|
||||
; X64-BMI1-NEXT: retq
|
||||
;
|
||||
; X64-BMI12-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X64-BMI12: # %bb.0:
|
||||
; X64-BMI12-NEXT: movl $1, %eax
|
||||
; X64-BMI12-NEXT: shrxl %edi, %eax, %eax
|
||||
; X64-BMI12-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-BMI12-NEXT: sete %al
|
||||
; X64-BMI12-NEXT: retq
|
||||
%t0 = lshr i32 1, %y
|
||||
%t1 = and i32 %t0, 2857740885
|
||||
%res = icmp eq i32 %t1, 0
|
||||
ret i1 %res
|
||||
}
|
||||
|
||||
;------------------------------------------------------------------------------;
|
||||
; A few negative tests
|
||||
;------------------------------------------------------------------------------;
|
||||
|
|
|
|||
|
|
@ -817,6 +817,91 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
|
|||
ret i1 %res
|
||||
}
|
||||
|
||||
;------------------------------------------------------------------------------;
|
||||
; What if X is a constant too?
|
||||
;------------------------------------------------------------------------------;
|
||||
|
||||
define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
|
||||
; X86-NOBMI-LABEL: scalar_i32_x_is_const_eq:
|
||||
; X86-NOBMI: # %bb.0:
|
||||
; X86-NOBMI-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-NOBMI-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X86-NOBMI-NEXT: shll %cl, %eax
|
||||
; X86-NOBMI-NEXT: testb $1, %al
|
||||
; X86-NOBMI-NEXT: sete %al
|
||||
; X86-NOBMI-NEXT: retl
|
||||
;
|
||||
; X86-BMI1-LABEL: scalar_i32_x_is_const_eq:
|
||||
; X86-BMI1: # %bb.0:
|
||||
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-BMI1-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X86-BMI1-NEXT: shll %cl, %eax
|
||||
; X86-BMI1-NEXT: testb $1, %al
|
||||
; X86-BMI1-NEXT: sete %al
|
||||
; X86-BMI1-NEXT: retl
|
||||
;
|
||||
; X86-BMI12-LABEL: scalar_i32_x_is_const_eq:
|
||||
; X86-BMI12: # %bb.0:
|
||||
; X86-BMI12-NEXT: movb {{[0-9]+}}(%esp), %al
|
||||
; X86-BMI12-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
|
||||
; X86-BMI12-NEXT: shlxl %eax, %ecx, %eax
|
||||
; X86-BMI12-NEXT: testb $1, %al
|
||||
; X86-BMI12-NEXT: sete %al
|
||||
; X86-BMI12-NEXT: retl
|
||||
;
|
||||
; X64-NOBMI-LABEL: scalar_i32_x_is_const_eq:
|
||||
; X64-NOBMI: # %bb.0:
|
||||
; X64-NOBMI-NEXT: movl %edi, %ecx
|
||||
; X64-NOBMI-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-NOBMI-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-NOBMI-NEXT: shll %cl, %eax
|
||||
; X64-NOBMI-NEXT: testb $1, %al
|
||||
; X64-NOBMI-NEXT: sete %al
|
||||
; X64-NOBMI-NEXT: retq
|
||||
;
|
||||
; X64-BMI1-LABEL: scalar_i32_x_is_const_eq:
|
||||
; X64-BMI1: # %bb.0:
|
||||
; X64-BMI1-NEXT: movl %edi, %ecx
|
||||
; X64-BMI1-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-BMI1-NEXT: shll %cl, %eax
|
||||
; X64-BMI1-NEXT: testb $1, %al
|
||||
; X64-BMI1-NEXT: sete %al
|
||||
; X64-BMI1-NEXT: retq
|
||||
;
|
||||
; X64-BMI12-LABEL: scalar_i32_x_is_const_eq:
|
||||
; X64-BMI12: # %bb.0:
|
||||
; X64-BMI12-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-BMI12-NEXT: shlxl %edi, %eax, %eax
|
||||
; X64-BMI12-NEXT: testb $1, %al
|
||||
; X64-BMI12-NEXT: sete %al
|
||||
; X64-BMI12-NEXT: retq
|
||||
%t0 = shl i32 2857740885, %y
|
||||
%t1 = and i32 %t0, 1
|
||||
%res = icmp eq i32 %t1, 0
|
||||
ret i1 %res
|
||||
}
|
||||
define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
|
||||
; X86-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X86: # %bb.0:
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
|
||||
; X86-NEXT: btl %eax, %ecx
|
||||
; X86-NEXT: setae %al
|
||||
; X86-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: scalar_i32_x_is_const2_eq:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
|
||||
; X64-NEXT: btl %edi, %eax
|
||||
; X64-NEXT: setae %al
|
||||
; X64-NEXT: retq
|
||||
%t0 = shl i32 1, %y
|
||||
%t1 = and i32 %t0, 2857740885
|
||||
%res = icmp eq i32 %t1, 0
|
||||
ret i1 %res
|
||||
}
|
||||
|
||||
;------------------------------------------------------------------------------;
|
||||
; A few negative tests
|
||||
;------------------------------------------------------------------------------;
|
||||
|
|
|
|||
Loading…
Reference in New Issue