forked from OSchip/llvm-project
[CVP] Add tests for sub nowrap inference; NFC
These are baseline tests for D60036. Patch by Luqman Aden. llvm-svn: 358808
This commit is contained in:
Nikita Popov
parent
b75c8fc6fb
commit
2e33f8de57
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@ -0,0 +1,601 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -correlated-propagation -cvp-dont-process-adds=false -S | FileCheck %s
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define void @test0(i32 %a) {
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; CHECK-LABEL: @test0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 100
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp sgt i32 %a, 100
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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define void @test1(i32 %a) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 100
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp ugt i32 %a, 100
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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define void @test2(i32 %a) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp ugt i32 %a, -1
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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define void @test3(i32 %a) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp sgt i32 %a, -1
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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define void @test4(i32 %a) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 2147483647
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp ugt i32 %a, 2147483647
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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define void @test5(i32 %a) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 2147483647
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp = icmp sle i32 %a, 2147483647
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check for a corner case where an integer value is represented with a constant
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; LVILatticeValue instead of constantrange. Check that we don't fail with an
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; assertion in this case.
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@b = global i32 0, align 4
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define void @test6(i32 %a) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A:%.*]], ptrtoint (i32* @b to i32)
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; CHECK-NEXT: ret void
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;
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bb:
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%sub = sub i32 %a, ptrtoint (i32* @b to i32)
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ret void
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}
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; Check that we can gather information for conditions in the form of
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; and ( i s< 100, Unknown )
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define void @test7(i32 %a, i1 %flag) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp ugt i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp ugt i32 %a, 100
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%cmp = and i1 %cmp.1, %flag
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that we can gather information for conditions in the form of
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; and ( i s< 100, i s> 0 )
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define void @test8(i32 %a) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
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; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp slt i32 %a, 100
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%cmp.2 = icmp sgt i32 %a, 0
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%cmp = and i1 %cmp.1, %cmp.2
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that for conditions in the form of cond1 && cond2 we don't mistakenly
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; assume that !cond1 && !cond2 holds down to false path.
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define void @test8_neg(i32 %a) {
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; CHECK-LABEL: @test8_neg(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
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; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp sge i32 %a, 100
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%cmp.2 = icmp sle i32 %a, 0
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%cmp = and i1 %cmp.1, %cmp.2
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br i1 %cmp, label %exit, label %bb
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that we can gather information for conditions in the form of
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; and ( i s< 100, and (i s> 0, Unknown )
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define void @test9(i32 %a, i1 %flag) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
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; CHECK-NEXT: [[CMP_3:%.*]] = and i1 [[CMP_2]], [[FLAG:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_3]]
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp slt i32 %a, 100
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%cmp.2 = icmp sgt i32 %a, 0
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%cmp.3 = and i1 %cmp.2, %flag
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%cmp = and i1 %cmp.1, %cmp.3
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that we can gather information for conditions in the form of
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; and ( i s> Unknown, ... )
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define void @test10(i32 %a, i32 %b, i1 %flag) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp sgt i32 %a, %b
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%cmp = and i1 %cmp.1, %flag
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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@limit = external global i32
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define i32 @test11(i32* %p, i32 %i) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[LIMIT:%.*]] = load i32, i32* [[P:%.*]], !range !0
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; CHECK-NEXT: [[WITHIN_1:%.*]] = icmp slt i32 [[LIMIT]], [[I:%.*]]
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; CHECK-NEXT: [[I_MINUS_7:%.*]] = add i32 [[I]], -7
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; CHECK-NEXT: [[WITHIN_2:%.*]] = icmp slt i32 [[LIMIT]], [[I_MINUS_7]]
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; CHECK-NEXT: [[WITHIN:%.*]] = and i1 [[WITHIN_1]], [[WITHIN_2]]
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; CHECK-NEXT: br i1 [[WITHIN]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[I_MINUS_6:%.*]] = sub i32 [[I]], 6
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; CHECK-NEXT: ret i32 [[I_MINUS_6]]
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; CHECK: else:
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; CHECK-NEXT: ret i32 0
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;
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%limit = load i32, i32* %p, !range !{i32 0, i32 2147483647}
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%within.1 = icmp slt i32 %limit, %i
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%i.minus.7 = add i32 %i, -7
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%within.2 = icmp slt i32 %limit, %i.minus.7
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%within = and i1 %within.1, %within.2
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br i1 %within, label %then, label %else
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then:
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%i.minus.6 = sub i32 %i, 6
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ret i32 %i.minus.6
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else:
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ret i32 0
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}
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; Check that we can gather information for conditions is the form of
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; or ( i s<= -100, Unknown )
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define void @test12(i32 %a, i1 %flag) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp sle i32 [[A:%.*]], -100
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; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp sle i32 %a, -100
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%cmp = or i1 %cmp.1, %flag
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br i1 %cmp, label %exit, label %bb
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that we can gather information for conditions is the form of
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; or ( i s>= 100, i s<= 0 )
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define void @test13(i32 %a) {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
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; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp sge i32 %a, 100
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%cmp.2 = icmp sle i32 %a, 0
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%cmp = or i1 %cmp.1, %cmp.2
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br i1 %cmp, label %exit, label %bb
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that for conditions is the form of cond1 || cond2 we don't mistakenly
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; assume that cond1 || cond2 holds down to true path.
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define void @test13_neg(i32 %a) {
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; CHECK-LABEL: @test13_neg(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
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; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
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; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp slt i32 %a, 100
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%cmp.2 = icmp sgt i32 %a, 0
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%cmp = or i1 %cmp.1, %cmp.2
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br i1 %cmp, label %bb, label %exit
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bb:
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%sub = sub i32 %a, 1
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br label %exit
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exit:
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ret void
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}
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; Check that we can gather information for conditions is the form of
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; or ( i s>=100, or (i s<= 0, Unknown )
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define void @test14(i32 %a, i1 %flag) {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
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; CHECK-NEXT: [[CMP_3:%.*]] = or i1 [[CMP_2]], [[FLAG:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_3]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp sge i32 %a, 100
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%cmp.2 = icmp sle i32 %a, 0
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%cmp.3 = or i1 %cmp.2, %flag
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%cmp = or i1 %cmp.1, %cmp.3
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br i1 %cmp, label %exit, label %bb
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bb:
|
||||
%sub = sub i32 %a, 1
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
|
||||
; Check that we can gather information for conditions is the form of
|
||||
; or ( i s<= Unknown, ... )
|
||||
define void @test15(i32 %a, i32 %b, i1 %flag) {
|
||||
; CHECK-LABEL: @test15(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP_1:%.*]] = icmp sle i32 [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG:%.*]]
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], 1
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%cmp.1 = icmp sle i32 %a, %b
|
||||
%cmp = or i1 %cmp.1, %flag
|
||||
br i1 %cmp, label %exit, label %bb
|
||||
|
||||
bb:
|
||||
%sub = sub i32 %a, 1
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
|
||||
; single basic block loop
|
||||
; because the loop exit condition is SLT, we can supplement the iv sub
|
||||
; (iv.next def) with an nsw.
|
||||
define i32 @test16(i32* %n, i32* %a) {
|
||||
; CHECK-LABEL: @test16(
|
||||
; CHECK-NEXT: preheader:
|
||||
; CHECK-NEXT: br label [[LOOP:%.*]]
|
||||
; CHECK: loop:
|
||||
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[ACC_CURR:%.*]], [[LOOP]] ]
|
||||
; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* [[A:%.*]] unordered, align 8
|
||||
; CHECK-NEXT: fence acquire
|
||||
; CHECK-NEXT: [[ACC_CURR]] = sub i32 [[ACC]], [[X]]
|
||||
; CHECK-NEXT: [[IV_NEXT]] = sub i32 [[IV]], -1
|
||||
; CHECK-NEXT: [[NVAL:%.*]] = load atomic i32, i32* [[N:%.*]] unordered, align 8
|
||||
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[IV_NEXT]], [[NVAL]]
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret i32 [[ACC_CURR]]
|
||||
;
|
||||
preheader:
|
||||
br label %loop
|
||||
|
||||
loop:
|
||||
%iv = phi i32 [ 0, %preheader ], [ %iv.next, %loop ]
|
||||
%acc = phi i32 [ 0, %preheader ], [ %acc.curr, %loop ]
|
||||
%x = load atomic i32, i32* %a unordered, align 8
|
||||
fence acquire
|
||||
%acc.curr = sub i32 %acc, %x
|
||||
%iv.next = sub i32 %iv, -1
|
||||
%nval = load atomic i32, i32* %n unordered, align 8
|
||||
%cmp = icmp slt i32 %iv.next, %nval
|
||||
br i1 %cmp, label %loop, label %exit
|
||||
|
||||
exit:
|
||||
ret i32 %acc.curr
|
||||
}
|
||||
|
||||
define void @test17(i32 %a) {
|
||||
; CHECK-LABEL: @test17(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 100
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[A]]
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%cmp = icmp sgt i32 %a, 100
|
||||
br i1 %cmp, label %bb, label %exit
|
||||
|
||||
bb:
|
||||
%sub = sub i32 1, %a
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test18(i32 %a) {
|
||||
; CHECK-LABEL: @test18(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 10000
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub i32 -2, [[A]]
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%cmp = icmp sgt i32 %a, 10000
|
||||
br i1 %cmp, label %bb, label %exit
|
||||
|
||||
bb:
|
||||
%sub = sub i32 -2, %a
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test19(i32 %a) {
|
||||
; CHECK-LABEL: @test19(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 100
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub i32 -1, [[A]]
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%cmp = icmp ult i32 %a, 100
|
||||
br i1 %cmp, label %bb, label %exit
|
||||
|
||||
bb:
|
||||
%sub = sub i32 -1, %a
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test20(i32 %a) {
|
||||
; CHECK-LABEL: @test20(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 2147483647
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
|
||||
; CHECK: bb:
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[A]]
|
||||
; CHECK-NEXT: br label [[EXIT]]
|
||||
; CHECK: exit:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%cmp = icmp ugt i32 %a, 2147483647
|
||||
br i1 %cmp, label %bb, label %exit
|
||||
|
||||
bb:
|
||||
%sub = sub i32 0, %a
|
||||
br label %exit
|
||||
|
||||
exit:
|
||||
ret void
|
||||
}
|
||||
Loading…
Reference in New Issue