forked from OSchip/llvm-project
[RISCV] Duplicate pseudo expansion comment to RISCVMCCodeEmitter
Follow-on from D77443. Although we're not fixing any of these pseudo-instructions, the potential for them to be out of sync still exists.
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@ -189,6 +189,9 @@ void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
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// Get byte count of instruction.
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unsigned Size = Desc.getSize();
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// RISCVInstrInfo::getInstSizeInBytes hard-codes the number of expanded
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// instructions for each pseudo, and must be updated when adding new pseudos
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// or changing existing ones.
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if (MI.getOpcode() == RISCV::PseudoCALLReg ||
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MI.getOpcode() == RISCV::PseudoCALL ||
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MI.getOpcode() == RISCV::PseudoTAIL ||
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