forked from OSchip/llvm-project
Enable printing of immediates that do not fit in 16-bit. .cprestore can have
offsets that are larger than 0x10000. llvm-svn: 132003
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@ -326,7 +326,7 @@ void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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break;
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case MachineOperand::MO_Immediate:
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O << (short int)MO.getImm();
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O << MO.getImm();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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@ -119,7 +119,7 @@ static bool expandRegLargeImmPair(unsigned OrigReg, int OrigImm,
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MachineFunction* MF = MBB.getParent();
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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DebugLoc DL = I->getDebugLoc();
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int ImmLo = OrigImm & 0xffff;
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int ImmLo = (short)(OrigImm & 0xffff);
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int ImmHi = (((unsigned)OrigImm & 0xffff0000) >> 16) +
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((OrigImm & 0x8000) != 0);
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@ -380,7 +380,7 @@ def ATMACRO : MipsPseudo<(outs), (ins), ".set\tat", []>;
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// are used, we have the same behavior, but get also a bunch of warnings
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// from the assembler.
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def CPLOAD : MipsPseudo<(outs), (ins CPURegs:$picreg), ".cpload\t$picreg", []>;
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def CPRESTORE : MipsPseudo<(outs), (ins uimm16:$loc), ".cprestore\t$loc\n", []>;
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def CPRESTORE : MipsPseudo<(outs), (ins i32imm:$loc), ".cprestore\t$loc\n", []>;
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//===----------------------------------------------------------------------===//
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// Instruction definition
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@ -234,7 +234,7 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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else {
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const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
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DebugLoc DL = II->getDebugLoc();
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int ImmLo = Offset & 0xffff;
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int ImmLo = (short)(Offset & 0xffff);
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int ImmHi = (((unsigned)Offset & 0xffff0000) >> 16) +
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((Offset & 0x8000) != 0);
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