forked from OSchip/llvm-project
[GlobalISel] Add a 'getConstantVRegVal' helper.
Use it to compare immediate operands. llvm-svn: 298855
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@ -16,6 +16,7 @@
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#ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
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#define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
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#include "llvm/ADT/Optional.h"
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#include <cstdint>
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namespace llvm {
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@ -61,6 +62,9 @@ protected:
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const TargetRegisterInfo &TRI,
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const RegisterBankInfo &RBI) const;
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Optional<int64_t> getConstantVRegVal(unsigned VReg,
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const MachineRegisterInfo &MRI) const;
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bool isOperandImmEqual(const MachineOperand &MO, int64_t Value,
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const MachineRegisterInfo &MRI) const;
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};
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@ -68,21 +68,29 @@ bool InstructionSelector::constrainSelectedInstRegOperands(
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return true;
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}
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Optional<int64_t>
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InstructionSelector::getConstantVRegVal(unsigned VReg,
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const MachineRegisterInfo &MRI) const {
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MachineInstr *MI = MRI.getVRegDef(VReg);
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if (MI->getOpcode() != TargetOpcode::G_CONSTANT)
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return None;
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if (MI->getOperand(1).isImm())
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return MI->getOperand(1).getImm();
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if (MI->getOperand(1).isCImm() &&
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MI->getOperand(1).getCImm()->getBitWidth() <= 64)
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return MI->getOperand(1).getCImm()->getSExtValue();
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return None;
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}
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bool InstructionSelector::isOperandImmEqual(
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const MachineOperand &MO, int64_t Value,
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const MachineRegisterInfo &MRI) const {
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// TODO: We should also test isImm() and isCImm() too but this isn't required
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// until a DAGCombine equivalent is implemented.
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if (MO.isReg()) {
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MachineInstr *Def = MRI.getVRegDef(MO.getReg());
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if (Def->getOpcode() != TargetOpcode::G_CONSTANT)
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return false;
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assert(Def->getOperand(1).isCImm() &&
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"G_CONSTANT values must be constants");
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const ConstantInt &Imm = *Def->getOperand(1).getCImm();
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return Imm.getBitWidth() <= 64 && Imm.getSExtValue() == Value;
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}
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if (MO.getReg())
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if (auto VRegVal = getConstantVRegVal(MO.getReg(), MRI))
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return *VRegVal == Value;
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return false;
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}
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