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[InstCombine] Add vectors-with-undef tests for and(logicalshift(1,X),1) --> zext(X == 0)

This commit is contained in:
Simon Pilgrim 2020-10-16 15:56:05 +01:00
parent 81b7e2141f
commit 2d1fea2923
1 changed files with 22 additions and 0 deletions
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22
llvm/test/Transforms/InstCombine/and2.ll
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@ -135,6 +135,17 @@ define <2 x i8> @and1_shl1_is_cmp_eq_0_vec(<2 x i8> %x) {
ret <2 x i8> %and
}
define <2 x i8> @and1_shl1_is_cmp_eq_0_vec_undef(<2 x i8> %x) {
; CHECK-LABEL: @and1_shl1_is_cmp_eq_0_vec_undef(
; CHECK-NEXT: [[SH:%.*]] = shl <2 x i8> <i8 1, i8 undef>, [[X:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[SH]], <i8 1, i8 undef>
; CHECK-NEXT: ret <2 x i8> [[AND]]
;
%sh = shl <2 x i8> <i8 1, i8 undef>, %x
%and = and <2 x i8> %sh, <i8 1, i8 undef>
ret <2 x i8> %and
}
; (1 >> x) & 1 --> zext(x == 0)
define i8 @and1_lshr1_is_cmp_eq_0(i8 %x) {
@ -176,6 +187,17 @@ define <2 x i8> @and1_lshr1_is_cmp_eq_0_vec(<2 x i8> %x) {
ret <2 x i8> %and
}
define <2 x i8> @and1_lshr1_is_cmp_eq_0_vec_undef(<2 x i8> %x) {
; CHECK-LABEL: @and1_lshr1_is_cmp_eq_0_vec_undef(
; CHECK-NEXT: [[SH:%.*]] = lshr <2 x i8> <i8 1, i8 undef>, [[X:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[SH]], <i8 1, i8 undef>
; CHECK-NEXT: ret <2 x i8> [[AND]]
;
%sh = lshr <2 x i8> <i8 1, i8 undef>, %x
%and = and <2 x i8> %sh, <i8 1, i8 undef>
ret <2 x i8> %and
}
; The add in this test is unnecessary because the LSBs of the LHS are 0 and the 'and' only consumes bits from those LSBs. It doesn't matter what happens to the upper bits.
define i32 @test11(i32 %a, i32 %b) {
; CHECK-LABEL: @test11(