forked from OSchip/llvm-project
Only call isUse/isDef on register operands
llvm-svn: 30118
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45456d44e3
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2cb238320d
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@ -248,7 +248,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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// Process all explicit uses...
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for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.isUse() && MO.isRegister() && MO.getReg()) {
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if (MO.isRegister() && MO.isUse() && MO.getReg()) {
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if (MRegisterInfo::isVirtualRegister(MO.getReg())){
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HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI);
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} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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@ -268,7 +268,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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// Process all explicit defs...
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for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.isDef() && MO.isRegister() && MO.getReg()) {
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if (MO.isRegister() && MO.isDef() && MO.getReg()) {
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if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
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VarInfo &VRInfo = getVarInfo(MO.getReg());
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@ -158,7 +158,7 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
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unsigned StartOp = 0;
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// Specialize printing if op#0 is definition
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if (getNumOperands() && getOperand(0).isDef() && !getOperand(0).isUse()) {
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if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
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::print(getOperand(0), OS, TM);
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OS << " = ";
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++StartOp; // Don't print this operand again!
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@ -176,11 +176,8 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
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OS << " ";
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::print(mop, OS, TM);
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if (mop.isDef())
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if (mop.isUse())
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OS << "<def&use>";
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else
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OS << "<def>";
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if (mop.isReg() && mop.isDef())
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OS << "<def>";
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}
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OS << "\n";
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@ -204,11 +201,8 @@ std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
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for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) {
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os << "\t" << MI.getOperand(i);
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if (MI.getOperand(i).isDef())
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if (MI.getOperand(i).isUse())
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os << "<d&u>";
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else
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os << "<d>";
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if (MI.getOperand(i).isReg() && MI.getOperand(i).isDef())
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os << "<d>";
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}
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return os << "\n";
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