forked from OSchip/llvm-project
[IRCE] Recognize loops with ne/eq latch conditions
In some particular cases eq/ne conditions can be turned into equivalent slt/sgt conditions. This patch teaches parseLoopStructure to handle some of these cases. Differential Revision: https://reviews.llvm.org/D35010 llvm-svn: 308264
This commit is contained in:
Max Kazantsev
parent
d782ca3a3c
commit
2c627a97fd
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@ -805,6 +805,25 @@ LoopStructure::parseLoopStructure(ScalarEvolution &SE, BranchProbabilityInfo &BP
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ConstantInt *One = ConstantInt::get(IndVarTy, 1);
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// TODO: generalize the predicates here to also match their unsigned variants.
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if (IsIncreasing) {
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bool DecreasedRightValueByOne = false;
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// Try to turn eq/ne predicates to those we can work with.
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if (Pred == ICmpInst::ICMP_NE && LatchBrExitIdx == 1)
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// while (++i != len) { while (++i < len) {
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// ... ---> ...
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// } }
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Pred = ICmpInst::ICMP_SLT;
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else if (Pred == ICmpInst::ICMP_EQ && LatchBrExitIdx == 0 &&
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!CanBeSMin(SE, RightSCEV)) {
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// while (true) { while (true) {
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// if (++i == len) ---> if (++i > len - 1)
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// break; break;
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// ... ...
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// } }
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Pred = ICmpInst::ICMP_SGT;
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RightSCEV = SE.getMinusSCEV(RightSCEV, SE.getOne(RightSCEV->getType()));
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DecreasedRightValueByOne = true;
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}
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bool FoundExpectedPred =
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(Pred == ICmpInst::ICMP_SLT && LatchBrExitIdx == 1) ||
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(Pred == ICmpInst::ICMP_SGT && LatchBrExitIdx == 0);
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@ -829,16 +848,41 @@ LoopStructure::parseLoopStructure(ScalarEvolution &SE, BranchProbabilityInfo &BP
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return None;
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}
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IRBuilder<> B(Preheader->getTerminator());
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RightValue = B.CreateAdd(RightValue, One);
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// We need to increase the right value unless we have already decreased
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// it virtually when we replaced EQ with SGT.
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if (!DecreasedRightValueByOne) {
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IRBuilder<> B(Preheader->getTerminator());
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RightValue = B.CreateAdd(RightValue, One);
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}
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} else {
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if (!SE.isLoopEntryGuardedByCond(&L, CmpInst::ICMP_SLT, IndVarStart,
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RightSCEV)) {
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FailureReason = "Induction variable start not bounded by upper limit";
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return None;
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}
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assert(!DecreasedRightValueByOne &&
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"Right value can be decreased only for LatchBrExitIdx == 0!");
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}
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} else {
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bool IncreasedRightValueByOne = false;
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// Try to turn eq/ne predicates to those we can work with.
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if (Pred == ICmpInst::ICMP_NE && LatchBrExitIdx == 1)
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// while (--i != len) { while (--i > len) {
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// ... ---> ...
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// } }
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Pred = ICmpInst::ICMP_SGT;
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else if (Pred == ICmpInst::ICMP_EQ && LatchBrExitIdx == 0 &&
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!CanBeSMax(SE, RightSCEV)) {
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// while (true) { while (true) {
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// if (--i == len) ---> if (--i < len + 1)
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// break; break;
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// ... ...
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// } }
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Pred = ICmpInst::ICMP_SLT;
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RightSCEV = SE.getAddExpr(RightSCEV, SE.getOne(RightSCEV->getType()));
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IncreasedRightValueByOne = true;
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}
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bool FoundExpectedPred =
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(Pred == ICmpInst::ICMP_SGT && LatchBrExitIdx == 1) ||
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(Pred == ICmpInst::ICMP_SLT && LatchBrExitIdx == 0);
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@ -863,14 +907,20 @@ LoopStructure::parseLoopStructure(ScalarEvolution &SE, BranchProbabilityInfo &BP
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return None;
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}
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IRBuilder<> B(Preheader->getTerminator());
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RightValue = B.CreateSub(RightValue, One);
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// We need to decrease the right value unless we have already increased
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// it virtually when we replaced EQ with SLT.
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if (!IncreasedRightValueByOne) {
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IRBuilder<> B(Preheader->getTerminator());
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RightValue = B.CreateSub(RightValue, One);
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}
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} else {
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if (!SE.isLoopEntryGuardedByCond(&L, CmpInst::ICMP_SGT, IndVarStart,
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RightSCEV)) {
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FailureReason = "Induction variable start not bounded by lower limit";
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return None;
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}
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assert(!IncreasedRightValueByOne &&
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"Right value can be increased only for LatchBrExitIdx == 0!");
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}
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}
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@ -0,0 +1,257 @@
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; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s
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; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK-NOT: irce: in function test_02: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK: irce: in function test_03: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK-NOT: irce: in function test_04: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK: irce: in function test_05: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK-NOT: irce: in function test_06: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK: irce: in function test_07: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; CHECK-NOT: irce: in function test_08: constrained Loop at depth 1 containing: %loop<header><exiting>,%in.bounds<latch><exiting>
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; Show that IRCE can turn 'ne' condition to 'slt' in increasing IV.
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define void @test_01(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_01
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; CHECK: main.exit.selector:
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; CHECK-NEXT: [[PSEUDO_PHI:%[^ ]+]] = phi i32 [ %idx.next, %in.bounds ]
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; CHECK-NEXT: [[COND:%[^ ]+]] = icmp slt i32 [[PSEUDO_PHI]], 100
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; CHECK-NEXT: br i1 [[COND]]
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 0, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, 1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp ne i32 %idx.next, 100
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br i1 %next, label %loop, label %exit
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that if n is not known to be greater than the starting value, IRCE
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; doesn't apply.
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define void @test_02(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_02(
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 0, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, 1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp ne i32 %idx.next, -100
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br i1 %next, label %loop, label %exit
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that IRCE can turn 'eq' condition to 'sge' in increasing IV.
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define void @test_03(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_03(
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; CHECK: main.exit.selector:
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; CHECK-NEXT: [[PSEUDO_PHI:%[^ ]+]] = phi i32 [ %idx.next, %in.bounds ]
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; CHECK-NEXT: [[COND:%[^ ]+]] = icmp slt i32 [[PSEUDO_PHI]], 100
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; CHECK-NEXT: br i1 [[COND]]
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 0, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, 1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp eq i32 %idx.next, 100
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br i1 %next, label %exit, label %loop
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that if n is not known to be greater than the starting value, IRCE
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; doesn't apply.
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define void @test_04(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_04(
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 0, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, 1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp eq i32 %idx.next, -100
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br i1 %next, label %exit, label %loop
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that IRCE can turn 'ne' condition to 'sgt' in decreasing IV.
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define void @test_05(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_05(
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; CHECK: preloop.exit.selector:
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; CHECK-NEXT: [[PSEUDO_PHI:%[^ ]+]] = phi i32 [ %idx.next.preloop, %in.bounds.preloop ]
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; CHECK-NEXT: [[COND:%[^ ]+]] = icmp sgt i32 [[PSEUDO_PHI]], 0
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; CHECK-NEXT: br i1 [[COND]]
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 100, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, -1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp ne i32 %idx.next, 0
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br i1 %next, label %loop, label %exit
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that IRCE cannot turn 'ne' condition to 'sgt' in decreasing IV if the end
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; value is not proved to be less than the start value.
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define void @test_06(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_06(
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 100, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, -1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp ne i32 %idx.next, 120
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br i1 %next, label %loop, label %exit
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that IRCE can turn 'eq' condition to 'slt' in decreasing IV.
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define void @test_07(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_07(
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; CHECK: preloop.exit.selector:
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; CHECK-NEXT: [[PSEUDO_PHI:%[^ ]+]] = phi i32 [ %idx.next.preloop, %in.bounds.preloop ]
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; CHECK-NEXT: [[COND:%[^ ]+]] = icmp sgt i32 [[PSEUDO_PHI]], 0
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; CHECK-NEXT: br i1 [[COND]]
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 100, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, -1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp eq i32 %idx.next, 0
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br i1 %next, label %exit, label %loop
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; Show that IRCE cannot turn 'eq' condition to 'slt' in decreasing IV if the end
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; value is not proved to be less than the start value.
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define void @test_08(i32* %arr, i32* %a_len_ptr) #0 {
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; CHECK: test_08(
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entry:
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%len = load i32, i32* %a_len_ptr, !range !0
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br label %loop
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loop:
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%idx = phi i32 [ 100, %entry ], [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, -1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32, i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp eq i32 %idx.next, 120
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br i1 %next, label %exit, label %loop
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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!0 = !{i32 0, i32 50}
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!1 = !{!"branch_weights", i32 64, i32 4}
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