forked from OSchip/llvm-project
[X86][SSE] Added more tests for vector multiplications as utility for D37896
Added additional tests for vector multiplications with multipliers that are: * powers of 2 displaced by 1, * product of a power of 2 displaced by one with another power of 2. Patch by @pacxx (Michael Haidl) Differential Revision: https://reviews.llvm.org/D38350 llvm-svn: 314504
This commit is contained in:
Simon Pilgrim
parent
0168ef26ec
commit
2b96841d1d
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@ -701,6 +701,236 @@ define <2 x i64> @mul_v2i64_15_63(<2 x i64> %a0) nounwind {
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ret <2 x i64> %1
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}
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define <2 x i64> @mul_v2i64_neg_15_63(<2 x i64> %a0) nounwind {
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; X86-LABEL: mul_v2i64_neg_15_63:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [4294967281,4294967295,4294967233,4294967295]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: movdqa %xmm0, %xmm3
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; X86-NEXT: psrlq $32, %xmm3
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; X86-NEXT: pmuludq %xmm1, %xmm3
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; X86-NEXT: pmuludq {{\.LCPI.*}}, %xmm0
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; X86-NEXT: paddq %xmm3, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_neg_15_63:
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; X64: # BB#0:
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; X64-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553]
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; X64-NEXT: movdqa %xmm0, %xmm2
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; X64-NEXT: pmuludq %xmm1, %xmm2
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; X64-NEXT: movdqa %xmm0, %xmm3
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; X64-NEXT: psrlq $32, %xmm3
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; X64-NEXT: pmuludq %xmm1, %xmm3
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; X64-NEXT: pmuludq {{.*}}(%rip), %xmm0
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; X64-NEXT: paddq %xmm3, %xmm0
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; X64-NEXT: psllq $32, %xmm0
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; X64-NEXT: paddq %xmm2, %xmm0
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; X64-NEXT: retq
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;
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; X64-AVX-LABEL: mul_v2i64_neg_15_63:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553]
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
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; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm3
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm3, %xmm1
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; X64-AVX-NEXT: vpmuludq {{.*}}(%rip), %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0
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; X64-AVX-NEXT: retq
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%1 = mul <2 x i64> %a0, <i64 -15, i64 -63>
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ret <2 x i64> %1
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}
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define <2 x i64> @mul_v2i64_neg_17_65(<2 x i64> %a0) nounwind {
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; X86-LABEL: mul_v2i64_neg_17_65:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [4294967279,4294967295,4294967231,4294967295]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: movdqa %xmm0, %xmm3
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; X86-NEXT: psrlq $32, %xmm3
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; X86-NEXT: pmuludq %xmm1, %xmm3
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; X86-NEXT: pmuludq {{\.LCPI.*}}, %xmm0
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; X86-NEXT: paddq %xmm3, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_neg_17_65:
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; X64: # BB#0:
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; X64-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551]
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; X64-NEXT: movdqa %xmm0, %xmm2
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; X64-NEXT: pmuludq %xmm1, %xmm2
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; X64-NEXT: movdqa %xmm0, %xmm3
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; X64-NEXT: psrlq $32, %xmm3
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; X64-NEXT: pmuludq %xmm1, %xmm3
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; X64-NEXT: pmuludq {{.*}}(%rip), %xmm0
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; X64-NEXT: paddq %xmm3, %xmm0
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; X64-NEXT: psllq $32, %xmm0
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; X64-NEXT: paddq %xmm2, %xmm0
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; X64-NEXT: retq
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;
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; X64-AVX-LABEL: mul_v2i64_neg_17_65:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551]
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
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; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm3
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm3, %xmm1
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; X64-AVX-NEXT: vpmuludq {{.*}}(%rip), %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0
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; X64-AVX-NEXT: retq
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%1 = mul <2 x i64> %a0, <i64 -17, i64 -65>
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ret <2 x i64> %1
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}
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define <2 x i64> @mul_v2i64_0_1(<2 x i64> %a0) nounwind {
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; X86-LABEL: mul_v2i64_0_1:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [0,0,1,0]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: psrlq $32, %xmm0
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; X86-NEXT: pmuludq %xmm1, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_0_1:
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; X64: # BB#0:
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: movq %rax, %xmm1
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; X64-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
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; X64-NEXT: movdqa %xmm0, %xmm2
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; X64-NEXT: pmuludq %xmm1, %xmm2
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; X64-NEXT: psrlq $32, %xmm0
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; X64-NEXT: pmuludq %xmm1, %xmm0
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; X64-NEXT: psllq $32, %xmm0
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; X64-NEXT: paddq %xmm2, %xmm0
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; X64-NEXT: retq
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;
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; X64-AVX-LABEL: mul_v2i64_0_1:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: movl $1, %eax
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; X64-AVX-NEXT: vmovq %rax, %xmm1
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; X64-AVX-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
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; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
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; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0
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; X64-AVX-NEXT: retq
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%1 = mul <2 x i64> %a0, <i64 0, i64 1>
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ret <2 x i64> %1
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}
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define <2 x i64> @mul_v2i64_neg_0_1(<2 x i64> %a0) nounwind {
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; X86-LABEL: mul_v2i64_neg_0_1:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [0,0,4294967295,4294967295]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: movdqa %xmm0, %xmm3
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; X86-NEXT: psrlq $32, %xmm3
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; X86-NEXT: pmuludq %xmm1, %xmm3
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; X86-NEXT: pmuludq {{\.LCPI.*}}, %xmm0
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; X86-NEXT: paddq %xmm3, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_neg_0_1:
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; X64: # BB#0:
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; X64-NEXT: movdqa %xmm0, %xmm1
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; X64-NEXT: psrlq $32, %xmm1
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; X64-NEXT: movq $-1, %rax
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; X64-NEXT: movq %rax, %xmm2
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; X64-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7]
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; X64-NEXT: pmuludq %xmm2, %xmm1
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; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
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; X64-NEXT: movq %rax, %xmm3
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; X64-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7]
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; X64-NEXT: pmuludq %xmm0, %xmm3
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; X64-NEXT: paddq %xmm1, %xmm3
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; X64-NEXT: psllq $32, %xmm3
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; X64-NEXT: pmuludq %xmm2, %xmm0
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; X64-NEXT: paddq %xmm3, %xmm0
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; X64-NEXT: retq
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;
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; X64-AVX-LABEL: mul_v2i64_neg_0_1:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm1
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; X64-AVX-NEXT: movq $-1, %rax
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; X64-AVX-NEXT: vmovq %rax, %xmm2
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; X64-AVX-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7]
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; X64-AVX-NEXT: vpmuludq %xmm2, %xmm1, %xmm1
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; X64-AVX-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
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; X64-AVX-NEXT: vmovq %rax, %xmm3
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; X64-AVX-NEXT: vpslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7]
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; X64-AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3
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; X64-AVX-NEXT: vpaddq %xmm1, %xmm3, %xmm1
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; X64-AVX-NEXT: vpsllq $32, %xmm1, %xmm1
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; X64-AVX-NEXT: vpmuludq %xmm2, %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; X64-AVX-NEXT: retq
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%1 = mul <2 x i64> %a0, <i64 0, i64 -1>
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ret <2 x i64> %1
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}
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define <2 x i64> @mul_v2i64_15_neg_63(<2 x i64> %a0) nounwind {
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; X86-LABEL: mul_v2i64_15_neg_63:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [15,0,4294967233,4294967295]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: movdqa %xmm0, %xmm3
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; X86-NEXT: psrlq $32, %xmm3
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; X86-NEXT: pmuludq %xmm1, %xmm3
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; X86-NEXT: pmuludq {{\.LCPI.*}}, %xmm0
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; X86-NEXT: paddq %xmm3, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_15_neg_63:
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; X64: # BB#0:
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; X64-NEXT: movdqa %xmm0, %xmm1
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; X64-NEXT: psrlq $32, %xmm1
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; X64-NEXT: movdqa {{.*#+}} xmm2 = [15,18446744073709551553]
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; X64-NEXT: pmuludq %xmm2, %xmm1
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; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
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; X64-NEXT: movq %rax, %xmm3
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; X64-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7]
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; X64-NEXT: pmuludq %xmm0, %xmm3
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; X64-NEXT: paddq %xmm1, %xmm3
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; X64-NEXT: psllq $32, %xmm3
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; X64-NEXT: pmuludq %xmm2, %xmm0
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; X64-NEXT: paddq %xmm3, %xmm0
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; X64-NEXT: retq
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;
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; X64-AVX-LABEL: mul_v2i64_15_neg_63:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm1
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; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [15,18446744073709551553]
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; X64-AVX-NEXT: vpmuludq %xmm2, %xmm1, %xmm1
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; X64-AVX-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
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; X64-AVX-NEXT: vmovq %rax, %xmm3
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; X64-AVX-NEXT: vpslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7]
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; X64-AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3
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; X64-AVX-NEXT: vpaddq %xmm1, %xmm3, %xmm1
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; X64-AVX-NEXT: vpsllq $32, %xmm1, %xmm1
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; X64-AVX-NEXT: vpmuludq %xmm2, %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; X64-AVX-NEXT: retq
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%1 = mul <2 x i64> %a0, <i64 15, i64 -63>
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ret <2 x i64> %1
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}
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define <4 x i32> @mul_v4i32_0_15_31_7(<4 x i32> %a0) nounwind {
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; X86-LABEL: mul_v4i32_0_15_31_7:
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; X86: # BB#0:
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@ -798,3 +1028,75 @@ define <16 x i8> @mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127(<16 x i8>
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%1 = mul <16 x i8> %a0, <i8 0, i8 1, i8 3, i8 7, i8 15, i8 31, i8 63, i8 127, i8 0, i8 1, i8 3, i8 7, i8 15, i8 31, i8 63, i8 127>
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ret <16 x i8> %1
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}
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define <2 x i64> @mul_v2i64_68_132(<2 x i64> %x) nounwind {
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; X86-LABEL: mul_v2i64_68_132:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [68,0,132,0]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: psrlq $32, %xmm0
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; X86-NEXT: pmuludq %xmm1, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_68_132:
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; X64: # BB#0:
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; X64-NEXT: movdqa {{.*#+}} xmm1 = [68,132]
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; X64-NEXT: movdqa %xmm0, %xmm2
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; X64-NEXT: pmuludq %xmm1, %xmm2
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; X64-NEXT: psrlq $32, %xmm0
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; X64-NEXT: pmuludq %xmm1, %xmm0
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; X64-NEXT: psllq $32, %xmm0
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; X64-NEXT: paddq %xmm2, %xmm0
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; X64-NEXT: retq
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;
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; X64-AVX-LABEL: mul_v2i64_68_132:
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; X64-AVX: # BB#0:
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; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [68,132]
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
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; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
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; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
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; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0
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; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0
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; X64-AVX-NEXT: retq
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%mul = mul <2 x i64> %x, <i64 68, i64 132>
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ret <2 x i64> %mul
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}
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define <2 x i64> @mul_v2i64_60_120(<2 x i64> %x) nounwind {
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; X86-LABEL: mul_v2i64_60_120:
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; X86: # BB#0:
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; X86-NEXT: movdqa {{.*#+}} xmm1 = [60,0,124,0]
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; X86-NEXT: movdqa %xmm0, %xmm2
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; X86-NEXT: pmuludq %xmm1, %xmm2
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; X86-NEXT: psrlq $32, %xmm0
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; X86-NEXT: pmuludq %xmm1, %xmm0
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; X86-NEXT: psllq $32, %xmm0
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; X86-NEXT: paddq %xmm2, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_v2i64_60_120:
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; X64: # BB#0:
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; X64-NEXT: movdqa {{.*#+}} xmm1 = [60,124]
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; X64-NEXT: movdqa %xmm0, %xmm2
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; X64-NEXT: pmuludq %xmm1, %xmm2
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; X64-NEXT: psrlq $32, %xmm0
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; X64-NEXT: pmuludq %xmm1, %xmm0
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; X64-NEXT: psllq $32, %xmm0
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; X64-NEXT: paddq %xmm2, %xmm0
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; X64-NEXT: retq
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;
|
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; X64-AVX-LABEL: mul_v2i64_60_120:
|
||||
; X64-AVX: # BB#0:
|
||||
; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [60,124]
|
||||
; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
|
||||
; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0
|
||||
; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0
|
||||
; X64-AVX-NEXT: retq
|
||||
%mul = mul <2 x i64> %x, <i64 60, i64 124>
|
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ret <2 x i64> %mul
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue