forked from OSchip/llvm-project
[LVI] Exploit nsw/nuw when computing constant ranges
As the title says. Modelled after similar code in SCEV. This is useful when analysing induction variables in loops which have been canonicalized by other passes. I wrote the tests as non-loops specifically to avoid the generality introduced in http://reviews.llvm.org/D17174. While that can handle many induction variables without *needing* to exploit nsw, there's no reason not to use it if we've already proven it. Differential Revision: http://reviews.llvm.org/D17177 llvm-svn: 260705
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@ -961,6 +961,27 @@ bool LazyValueInfoCache::solveBlockValueConstantRange(LVILatticeVal &BBLV,
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if (isa<BinaryOperator>(BBI)) {
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if (ConstantInt *RHS = dyn_cast<ConstantInt>(BBI->getOperand(1))) {
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RHSRange = ConstantRange(RHS->getValue());
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// Try to use information about wrap flags to refine the range LHS can
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// legally have. This is a slightly weird way to implement forward
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// propagation over overflowing instructions, but it seems to be the only
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// clean one we have. NOTE: Because we may have speculated the
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// instruction, we can't constrain other uses of LHS even if they would
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// seem to be equivelent control dependent with this op.
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if (auto *OBO = dyn_cast<OverflowingBinaryOperator>(BBI)) {
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unsigned WrapKind = 0;
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if (OBO->hasNoSignedWrap())
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WrapKind |= OverflowingBinaryOperator::NoSignedWrap;
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if (OBO->hasNoUnsignedWrap())
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WrapKind |= OverflowingBinaryOperator::NoUnsignedWrap;
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if (WrapKind) {
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auto OpCode = static_cast<Instruction::BinaryOps>(BBI->getOpcode());
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auto NoWrapCR =
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ConstantRange::makeNoWrapRegion(OpCode, RHS->getValue(), WrapKind);
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LHSRange = LHSRange.intersectWith(NoWrapCR);
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}
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}
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} else {
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BBLV.markOverdefined();
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return true;
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@ -199,3 +199,58 @@ out:
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next:
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ret void
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}
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; Can we use nsw in LVI to prove lack of overflow?
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define i1 @add_nsw(i32 %s) {
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; CHECK-LABEL: @add_nsw(
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entry:
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%cmp = icmp sgt i32 %s, 0
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br i1 %cmp, label %positive, label %out
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positive:
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%add = add nsw i32 %s, 1
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%res = icmp sgt i32 %add, 0
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br label %next
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next:
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; CHECK: next:
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; CHECK: ret i1 true
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ret i1 %res
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out:
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ret i1 false
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}
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define i1 @add_nsw2(i32 %s) {
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; CHECK-LABEL: @add_nsw2(
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entry:
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%cmp = icmp sge i32 %s, 0
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br i1 %cmp, label %positive, label %out
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positive:
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%add = add nsw i32 %s, 1
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%res = icmp ne i32 %add, 0
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br label %next
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next:
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; CHECK: next:
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; CHECK: ret i1 true
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ret i1 %res
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out:
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ret i1 false
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}
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define i1 @add_nuw(i32 %s) {
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; CHECK-LABEL: @add_nuw(
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entry:
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%cmp = icmp ult i32 %s, 400
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br i1 %cmp, label %positive, label %out
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positive:
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%add = add nsw i32 %s, 1
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%res = icmp ne i32 %add, -100
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br label %next
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next:
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; CHECK: next:
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; CHECK: ret i1 true
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ret i1 %res
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out:
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ret i1 false
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}
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