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[X86] Make sure we emit a SUBREG_TO_REG after the MOV32ri when creating a BEXTR64rr instruction from a shift/and pair. 

Fixes PR34589.

llvm-svn: 313126
This commit is contained in:
Craig Topper 2017-09-13 07:53:21 +00:00
parent 064b0fac93
commit 2b6bfda561
2 changed files with 21 additions and 2 deletions
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11
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -2337,8 +2337,15 @@ bool X86DAGToDAGISel::matchBEXTRFromAnd(SDNode *Node) {
if (!Subtarget->hasTBM()) {
ROpc = NVT == MVT::i64 ? X86::BEXTR64rr : X86::BEXTR32rr;
MOpc = NVT == MVT::i64 ? X86::BEXTR64rm : X86::BEXTR32rm;
SDNode *Move = CurDAG->getMachineNode(X86::MOV32ri, dl, NVT, New);
New = SDValue(Move, 0);
New = SDValue(CurDAG->getMachineNode(X86::MOV32ri, dl, NVT, New), 0);
if (NVT == MVT::i64) {
New =
SDValue(CurDAG->getMachineNode(
TargetOpcode::SUBREG_TO_REG, dl, MVT::i64,
CurDAG->getTargetConstant(0, dl, MVT::i64), New,
CurDAG->getTargetConstant(X86::sub_32bit, dl, MVT::i32)),
0);
}
}
MachineSDNode *NewNode;

12
llvm/test/CodeGen/X86/bmi.ll
View File

@ -405,6 +405,18 @@ define i64 @bextr64c(i64 %x, i32 %y) {
ret i64 %tmp1
}
define i64 @bextr64d(i64 %a) {
; CHECK-LABEL: bextr64d:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: movl $8450, %eax # imm = 0x2102
; CHECK-NEXT: bextrq %rax, %rdi, %rax
; CHECK-NEXT: retq
entry:
%shr = lshr i64 %a, 2
%and = and i64 %shr, 8589934591
ret i64 %and
}
define i32 @non_bextr32(i32 %x) {
; CHECK-LABEL: non_bextr32:
; CHECK: # BB#0: # %entry