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[AMDGPU] Shrink v_mac_legacy_f32 and v_fmac_legacy_f32 

Differential Revision: https://reviews.llvm.org/D112917
This commit is contained in:
Jay Foad 2021-11-01 09:45:46 +00:00
parent 838d8d1e2b
commit 2b548b18c1
4 changed files with 8 additions and 6 deletions
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6
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
View File

@ -3597,11 +3597,13 @@ bool SIInstrInfo::canShrink(const MachineInstr &MI,
// Additional verification is needed for sdst/src2.
return true;
}
case AMDGPU::V_MAC_F32_e64:
case AMDGPU::V_MAC_F16_e64:
case AMDGPU::V_FMAC_F32_e64:
case AMDGPU::V_MAC_F32_e64:
case AMDGPU::V_MAC_LEGACY_F32_e64:
case AMDGPU::V_FMAC_F16_e64:
case AMDGPU::V_FMAC_F32_e64:
case AMDGPU::V_FMAC_F64_e64:
case AMDGPU::V_FMAC_LEGACY_F32_e64:
if (!Src2->isReg() || !RI.isVGPR(MRI, Src2->getReg()) ||
hasModifiersSet(MI, AMDGPU::OpName::src2_modifiers))
return false;

4
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
View File

@ -272,7 +272,7 @@ define float @v_mad_legacy_f32(float %a, float %b, float %c) #2 {
; GFX6-LABEL: v_mad_legacy_f32:
; GFX6: ; %bb.0:
; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT: v_mac_legacy_f32_e64 v2, v0, v1
; GFX6-NEXT: v_mac_legacy_f32_e32 v2, v0, v1
; GFX6-NEXT: v_mov_b32_e32 v0, v2
; GFX6-NEXT: s_setpc_b64 s[30:31]
;
@ -292,7 +292,7 @@ define float @v_mad_legacy_f32(float %a, float %b, float %c) #2 {
; GFX101: ; %bb.0:
; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX101-NEXT: s_waitcnt_vscnt null, 0x0
; GFX101-NEXT: v_mac_legacy_f32_e64 v2, v0, v1
; GFX101-NEXT: v_mac_legacy_f32_e32 v2, v0, v1
; GFX101-NEXT: v_mov_b32_e32 v0, v2
; GFX101-NEXT: s_setpc_b64 s[30:31]
;

2
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
View File

@ -7,7 +7,7 @@ define float @v_fma(float %a, float %b, float %c) {
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: s_waitcnt_vscnt null, 0x0
; GCN-NEXT: v_fmac_legacy_f32_e64 v2, v0, v1
; GCN-NEXT: v_fmac_legacy_f32_e32 v2, v0, v1
; GCN-NEXT: v_mov_b32_e32 v0, v2
; GCN-NEXT: s_setpc_b64 s[30:31]
%fma = call float @llvm.amdgcn.fma.legacy(float %a, float %b, float %c)

2
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
View File

@ -51,7 +51,7 @@ define amdgpu_kernel void @test_add_mul_legacy_f32(float addrspace(1)* %out, flo
}
; GCN-LABEL: {{^}}test_mad_legacy_f32:
; GFX6: v_mac_legacy_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
; GFX6: v_mac_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
; GFX8: v_mad_legacy_f32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
; GFX9: v_mad_legacy_f32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
; GFX101: v_mac_legacy_f32_e64 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}