forked from OSchip/llvm-project
[x86] add tests for rotate left/right with masked shifter; NFC
As noted in the test comment, instcombine now produces the masked shift value even when it's not included in the source, so we should handle this. Although the AMD/Intel docs don't say it explicitly, over-rotating the narrow ops produces the same results. An existence proof that this works as expected on all x86 comes from gcc 4.9 or later: https://godbolt.org/g/K6rc1A llvm-svn: 310770
This commit is contained in:
Sanjay Patel
parent
3072b539da
commit
2b452c7192
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@ -138,3 +138,154 @@ define void @rotate_right_m64(i64 *%pa, i64 %b) {
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ret void
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}
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; The next 8 tests include masks of the narrow width shift amounts that should be eliminated.
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; These patterns are produced by instcombine after r310509.
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define i8 @rotate_left_8(i8 %x, i32 %amount) {
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; CHECK-LABEL: rotate_left_8:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $7, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rolb %cl, %dil
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%amt = trunc i32 %amount to i8
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%sub = sub i8 0, %amt
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%maskamt = and i8 %amt, 7
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%masksub = and i8 %sub, 7
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%shl = shl i8 %x, %maskamt
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%shr = lshr i8 %x, %masksub
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%or = or i8 %shl, %shr
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ret i8 %or
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}
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define i8 @rotate_right_8(i8 %x, i32 %amount) {
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; CHECK-LABEL: rotate_right_8:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $7, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorb %cl, %dil
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%amt = trunc i32 %amount to i8
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%sub = sub i8 0, %amt
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%maskamt = and i8 %amt, 7
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%masksub = and i8 %sub, 7
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%shr = lshr i8 %x, %maskamt
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%shl = shl i8 %x, %masksub
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%or = or i8 %shr, %shl
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ret i8 %or
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}
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define i16 @rotate_left_16(i16 %x, i32 %amount) {
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; CHECK-LABEL: rotate_left_16:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $15, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rolw %cl, %di
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%amt = trunc i32 %amount to i16
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%sub = sub i16 0, %amt
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%maskamt = and i16 %amt, 15
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%masksub = and i16 %sub, 15
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%shl = shl i16 %x, %maskamt
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%shr = lshr i16 %x, %masksub
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%or = or i16 %shl, %shr
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ret i16 %or
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}
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define i16 @rotate_right_16(i16 %x, i32 %amount) {
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; CHECK-LABEL: rotate_right_16:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $15, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorw %cl, %di
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%amt = trunc i32 %amount to i16
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%sub = sub i16 0, %amt
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%maskamt = and i16 %amt, 15
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%masksub = and i16 %sub, 15
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%shr = lshr i16 %x, %maskamt
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%shl = shl i16 %x, %masksub
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%or = or i16 %shr, %shl
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ret i16 %or
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}
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define void @rotate_left_m8(i8* %p, i32 %amount) {
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; CHECK-LABEL: rotate_left_m8:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $7, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rolb %cl, (%rdi)
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; CHECK-NEXT: retq
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%x = load i8, i8* %p, align 1
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%amt = trunc i32 %amount to i8
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%sub = sub i8 0, %amt
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%maskamt = and i8 %amt, 7
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%masksub = and i8 %sub, 7
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%shl = shl i8 %x, %maskamt
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%shr = lshr i8 %x, %masksub
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%or = or i8 %shl, %shr
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store i8 %or, i8* %p, align 1
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ret void
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}
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define void @rotate_right_m8(i8* %p, i32 %amount) {
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; CHECK-LABEL: rotate_right_m8:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $7, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorb %cl, (%rdi)
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; CHECK-NEXT: retq
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%x = load i8, i8* %p, align 1
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%amt = trunc i32 %amount to i8
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%sub = sub i8 0, %amt
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%maskamt = and i8 %amt, 7
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%masksub = and i8 %sub, 7
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%shl = shl i8 %x, %masksub
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%shr = lshr i8 %x, %maskamt
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%or = or i8 %shl, %shr
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store i8 %or, i8* %p, align 1
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ret void
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}
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define void @rotate_left_m16(i16* %p, i32 %amount) {
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; CHECK-LABEL: rotate_left_m16:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $15, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rolw %cl, (%rdi)
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; CHECK-NEXT: retq
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%x = load i16, i16* %p, align 1
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%amt = trunc i32 %amount to i16
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%sub = sub i16 0, %amt
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%maskamt = and i16 %amt, 15
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%masksub = and i16 %sub, 15
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%shl = shl i16 %x, %maskamt
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%shr = lshr i16 %x, %masksub
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%or = or i16 %shl, %shr
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store i16 %or, i16* %p, align 1
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ret void
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}
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define void @rotate_right_m16(i16* %p, i32 %amount) {
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; CHECK-LABEL: rotate_right_m16:
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; CHECK: # BB#0:
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; CHECK-NEXT: andb $15, %sil
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorw %cl, (%rdi)
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; CHECK-NEXT: retq
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%x = load i16, i16* %p, align 1
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%amt = trunc i32 %amount to i16
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%sub = sub i16 0, %amt
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%maskamt = and i16 %amt, 15
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%masksub = and i16 %sub, 15
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%shl = shl i16 %x, %masksub
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%shr = lshr i16 %x, %maskamt
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%or = or i16 %shl, %shr
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store i16 %or, i16* %p, align 1
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ret void
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}
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