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R600: Modernize test 

llvm-svn: 214108
This commit is contained in:
Matt Arsenault 2014-07-28 18:06:08 +00:00
parent 2b5d03ae94
commit 2b252ecf6b
1 changed files with 23 additions and 22 deletions
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45
llvm/test/CodeGen/R600/fmul.ll
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@ -1,10 +1,11 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; R600-CHECK: @fmul_f32
; R600-CHECK: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W ; FUNC-LABEL: @fmul_f32
; SI-CHECK: @fmul_f32 ; R600: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
; SI-CHECK: V_MUL_F32
; SI: V_MUL_F32
define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) { define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) {
entry: entry:
%0 = fmul float %a, %b %0 = fmul float %a, %b
@ -16,12 +17,12 @@ declare float @llvm.R600.load.input(i32) readnone
declare void @llvm.AMDGPU.store.output(float, i32) declare void @llvm.AMDGPU.store.output(float, i32)
; R600-CHECK: @fmul_v2f32 ; FUNC-LABEL: @fmul_v2f32
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}} ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}} ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
; SI-CHECK: @fmul_v2f32
; SI-CHECK: V_MUL_F32 ; SI: V_MUL_F32
; SI-CHECK: V_MUL_F32 ; SI: V_MUL_F32
define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) { define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
entry: entry:
%0 = fmul <2 x float> %a, %b %0 = fmul <2 x float> %a, %b
@ -29,16 +30,16 @@ entry:
ret void ret void
} }
; R600-CHECK: @fmul_v4f32 ; FUNC-LABEL: @fmul_v4f32
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; SI-CHECK: @fmul_v4f32
; SI-CHECK: V_MUL_F32 ; SI: V_MUL_F32
; SI-CHECK: V_MUL_F32 ; SI: V_MUL_F32
; SI-CHECK: V_MUL_F32 ; SI: V_MUL_F32
; SI-CHECK: V_MUL_F32 ; SI: V_MUL_F32
define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1 %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
%a = load <4 x float> addrspace(1) * %in %a = load <4 x float> addrspace(1) * %in