forked from OSchip/llvm-project
Renaming:
isTriviallyReMaterializable -> hasNoSideEffects isReallyTriviallyReMaterializable -> isTriviallyReMaterializable llvm-svn: 44702
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@ -288,24 +288,24 @@ public:
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return get(Opcode).Flags & M_HAS_OPTIONAL_DEF;
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}
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/// isTriviallyReMaterializable - Return true if the instruction is trivially
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/// hasNoSideEffects - Return true if the instruction is trivially
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/// rematerializable, meaning it has no side effects and requires no operands
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/// that aren't always available.
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bool isTriviallyReMaterializable(MachineInstr *MI) const {
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bool hasNoSideEffects(MachineInstr *MI) const {
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return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) &&
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isReallyTriviallyReMaterializable(MI);
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isTriviallyReMaterializable(MI);
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}
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protected:
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/// isReallyTriviallyReMaterializable - For instructions with opcodes for
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/// which the M_REMATERIALIZABLE flag is set, this function tests whether the
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/// instruction itself is actually trivially rematerializable, considering
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/// its operands. This is used for targets that have instructions that are
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/// only trivially rematerializable for specific uses. This predicate must
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/// return false if the instruction has any side effects other than
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/// producing a value, or if it requres any address registers that are not
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/// always available.
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virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const {
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/// isTriviallyReMaterializable - For instructions with opcodes for which the
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/// M_REMATERIALIZABLE flag is set, this function tests whether the
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/// instruction itself is actually trivially rematerializable, considering its
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/// operands. This is used for targets that have instructions that are only
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/// trivially rematerializable for specific uses. This predicate must return
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/// false if the instruction has any side effects other than producing a
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/// value, or if it requres any address registers that are not always
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/// available.
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virtual bool isTriviallyReMaterializable(MachineInstr *MI) const {
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return true;
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}
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@ -613,7 +613,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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return false;
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isLoad = false;
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if (tii_->isTriviallyReMaterializable(MI)) {
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if (tii_->hasNoSideEffects(MI)) {
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isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
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return true;
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}
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@ -120,7 +120,7 @@ namespace {
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if (TID->ImplicitUses || !I.getNumOperands()) return false;
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MachineOpCode Opcode = TID->Opcode;
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return TII->isTriviallyReMaterializable(&I) &&
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return TII->hasNoSideEffects(&I) &&
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// FIXME: Below necessary?
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!(TII->isReturn(Opcode) ||
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TII->isTerminatorInstr(Opcode) ||
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@ -116,7 +116,7 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI,
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}
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bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
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bool X86InstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const {
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switch (MI->getOpcode()) {
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default: break;
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case X86::MOV8rm:
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@ -239,7 +239,7 @@ public:
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unsigned& destReg) const;
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unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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bool isReallyTriviallyReMaterializable(MachineInstr *MI) const;
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bool isTriviallyReMaterializable(MachineInstr *MI) const;
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/// convertToThreeAddress - This method must be implemented by targets that
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/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
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